[llvm-commits] [llvm] r56087 - /llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

[Dale Johannesen]

On Sep 15, 2008, at 11:37 PMPDT, Duncan Sands wrote:

> Hi Dale,
>
>> On Sep 11, 2008, at 1:27 AMPDT, Duncan Sands wrote:
>>>> Succumb utterly to compatibility and implement
>>>> __sync_fetch_and_nand as ANDC, even though that's
>>>> not what nand means.
>>>
>>> what's this about?
>>
>> From the function's name one would expect it to do a NAND operation,
>> ~(A&B), and that's what I thought when I implemented it on ppc (which
>> conveniently has a NAND instruction).  In fact gcc generates ANDC,
>> (~A)&B, consistently on all platforms AFAICT.  I don't see anything
>> definitive in any documentation, so I'm going with gcc compatibility.
>> (I don't imagine anybody is using this anyway.)
>
> I see - thanks for the explanation.  How about changing the llvm name
> to ATOMIC_LOAD_ANDC?

I strongly prefer following the gcc name.