[llvm-commits] [llvm] r55881 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Arnold Schwaighofer]

Hi Duncan,

yes would perfectly make sense to add:
  // The first 3 float or double arguments, if the call is not a vararg
  // call and if SSE2 is available, are passed in SSE registers.
  CCIfNotVarArg<CCIfType<[f32,f64],
                CCIfSubtarget<"hasSSE2()",
                CCAssignToReg<[XMM0,XMM1,XMM2]>>>>,

  // Doubles get 8-byte slots that are 8-byte aligned.
  CCIfType<[f64], CCAssignToStack<8, 8>>,

to CC_X86_32_TailCall.

On Thu, Sep 11, 2008 at 11:35 AM, Duncan Sands <baldrick at free.fr> wrote:
> Hi Arnold, on a slightly different issue,
> the CC_X86_32_TailCall and CC_X86_32_FastCC
> calling conventions (which both correspond
> to FastCC) are now quite different.  Does
> it make sense to bring CC_X86_32_TailCall
> closer to CC_X86_32_FastCC?
>
> Ciao,
>
> Duncan.
>