[llvm-commits] [llvm] r55842 - /llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp

[Dan Gohman]

Author: djg
Date: Fri Sep  5 13:13:01 2008
New Revision: 55842

URL: http://llvm.org/viewvc/llvm-project?rev=55842&view=rev
Log:
Revert r55817. It broke PIC. FastISel will need to find a different
approach here.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp?rev=55842&r1=55841&r2=55842&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGEmit.cpp Fri Sep  5 13:13:01 2008
@@ -731,9 +731,7 @@
 
 /// EmitSchedule - Emit the machine code in scheduled order.
 MachineBasicBlock *ScheduleDAG::EmitSchedule() {
-  // If we're emitting the first code into the entry block, we
-  // have additional work to do.
-  bool isEntryBB = &MF->front() == BB && BB->empty();
+  bool isEntryBB = &MF->front() == BB;
 
   if (isEntryBB && !SchedLiveInCopies) {
     // If this is the first basic block in the function, and if it has live ins