[llvm-commits] [llvm] r55590 - /llvm/trunk/lib/Target/ARM/ARMInstrFormats.td

[Evan Cheng]

Author: evancheng
Date: Sun Aug 31 13:32:16 2008
New Revision: 55590

URL: http://llvm.org/viewvc/llvm-project?rev=55590&view=rev
Log:
Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=55590&r1=55589&r2=55590&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Sun Aug 31 13:32:16 2008
@@ -124,15 +124,16 @@
           string asm, list<dag> pattern>
   : I<opcod, oops, iops, AddrMode1, Size4Bytes, IndexModeNone, f, opc,
       asm, "", pattern> {
-  let Inst{5-6}  = 0;
-  let Inst{7-10} = opcod;
+  let Inst{21-24} = opcod;
+  let Inst{26-27} = 0;
 }
 class AsI1<bits<4> opcod, dag oops, dag iops, Format f, string opc,
            string asm, list<dag> pattern>
   : sI<opcod, oops, iops, AddrMode1, Size4Bytes, IndexModeNone, f, opc,
        asm, "", pattern> {
-  let Inst{5-6}  = 0;
-  let Inst{7-10} = opcod;
+  let Inst{20}    = 1;
+  let Inst{21-24} = opcod;
+  let Inst{26-27} = 0;
 }
 class AI2<bits<4> opcod, dag oops, dag iops, Format f, string opc,
           string asm, list<dag> pattern>