[llvm-commits] [llvm] r55565 - in /llvm/trunk: include/llvm/Target/TargetLowering.h lib/Target/IA64/IA64ISelDAGToDAG.cpp lib/Target/IA64/IA64ISelLowering.cpp

[Gabor Greif]

Author: ggreif
Date: Sat Aug 30 05:09:02 2008
New Revision: 55565

URL: http://llvm.org/viewvc/llvm-project?rev=55565&view=rev
Log:
fix some 80-col violations

Modified:
    llvm/trunk/include/llvm/Target/TargetLowering.h
    llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp

Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=55565&r1=55564&r2=55565&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Sat Aug 30 05:09:02 2008
@@ -1089,7 +1089,8 @@
        (Ret.getOperand(0) == SDValue(Call.getNode(),1) ||
         Ret.getOperand(0) == SDValue(Call.getNode(),0))) ||
       (NumOps > 1 &&
-       Ret.getOperand(0) == SDValue(Call.getNode(),Call.getNode()->getNumValues()-1) &&
+       Ret.getOperand(0) == SDValue(Call.getNode(),
+                                    Call.getNode()->getNumValues()-1) &&
        Ret.getOperand(1) == SDValue(Call.getNode(),0)))
       return true;
     return false;

Modified: llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp?rev=55565&r1=55564&r2=55565&view=diff

==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelDAGToDAG.cpp Sat Aug 30 05:09:02 2008
@@ -359,7 +359,8 @@
 
     Chain = CurDAG->getCopyToReg(Chain, IA64::r1, targetGP, InFlag);
     InFlag = Chain.getValue(1);
-    Chain = CurDAG->getCopyToReg(Chain, IA64::B6, targetEntryPoint, InFlag); // FLAG these?
+    Chain = CurDAG->getCopyToReg(Chain, IA64::B6,
+                                 targetEntryPoint, InFlag); // FLAG these?
     InFlag = Chain.getValue(1);
     
     CallOperand = CurDAG->getRegister(IA64::B6, MVT::i64);
@@ -520,7 +521,8 @@
         AddToISelQueue(Tmp);
         Tmp =
           SDValue(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial,
-                                          CurDAG->getTargetConstant(1, MVT::i64),
+                                          CurDAG->getTargetConstant(1,
+                                                                    MVT::i64),
                                           Tmp), 0);
         return CurDAG->SelectNodeTo(N, Opc, MVT::Other, Address, Tmp, Chain);
       }

Modified: llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp?rev=55565&r1=55564&r2=55565&view=diff

==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64ISelLowering.cpp Sat Aug 30 05:09:02 2008
@@ -398,7 +398,7 @@
       }
 
       if(ValToConvert.getNode()) {
-        Converts.push_back(DAG.getNode(IA64ISD::GETFD, MVT::i64, ValToConvert)); 
+        Converts.push_back(DAG.getNode(IA64ISD::GETFD, MVT::i64, ValToConvert));
       }
     }