[llvm-commits] [llvm] r55439 - in /llvm/trunk: include/llvm/CodeGen/FastISel.h lib/CodeGen/SelectionDAG/FastISel.cpp

[Owen Anderson]

Author: resistor
Date: Wed Aug 27 17:30:02 2008
New Revision: 55439

URL: http://llvm.org/viewvc/llvm-project?rev=55439&view=rev
Log:
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.

Modified:
    llvm/trunk/include/llvm/CodeGen/FastISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=55439&r1=55438&r2=55439&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Wed Aug 27 17:30:02 2008
@@ -193,6 +193,11 @@
                           const TargetRegisterClass *RC,
                           uint64_t Imm);
 
+  /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
+  /// from a specified index of a superregister.
+  unsigned FastEmitInst_extractsubreg(const TargetRegisterClass *RC,
+                                      unsigned Op0, uint32_t Idx);
+
 private:
   unsigned getRegForValue(Value *V,
                           DenseMap<const Value*, unsigned> &ValueMap);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=55439&r1=55438&r2=55439&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Wed Aug 27 17:30:02 2008
@@ -586,3 +586,14 @@
   BuildMI(MBB, II, ResultReg).addImm(Imm);
   return ResultReg;
 }
+
+unsigned FastISel::FastEmitInst_extractsubreg(const TargetRegisterClass *RC,
+                                              unsigned Op0, uint32_t Idx) {
+  const TargetRegisterClass* SRC = *(RC->subregclasses_begin()+Idx-1);
+  
+  unsigned ResultReg = createResultReg(SRC);
+  const TargetInstrDesc &II = TII.get(TargetInstrInfo::EXTRACT_SUBREG);
+  
+  BuildMI(MBB, II, ResultReg).addReg(Op0);
+  return ResultReg;
+}