[llvm-commits] [llvm] r55378 - /llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

[Owen Anderson]

Author: resistor
Date: Tue Aug 26 13:51:24 2008
New Revision: 55378

URL: http://llvm.org/viewvc/llvm-project?rev=55378&view=rev
Log:
Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts,
allowing it to support the full range of conversions people might ask for in a correct manner.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=55378&r1=55377&r2=55378&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Tue Aug 26 13:51:24 2008
@@ -251,19 +251,30 @@
           // Unhandled type. Halt "fast" selection and bail.
           return I;
         
-        // Otherwise, insert a register-to-register copy.
-        TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT);
-        TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT);
         unsigned Op0 = ValueMap[I->getOperand(0)];
-        unsigned ResultReg = createResultReg(DstClass);
-        
         if (Op0 == 0)
           // Unhandled operand. Halt "fast" selection and bail.
           return false;
         
-        bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
-                                             Op0, DstClass, SrcClass);
-        if (!InsertedCopy)
+        // First, try to perform the bitcast by inserting a reg-reg copy.
+        unsigned ResultReg = 0;
+        if (SrcVT.getSimpleVT() == DstVT.getSimpleVT()) {
+          TargetRegisterClass* SrcClass = TLI.getRegClassFor(SrcVT);
+          TargetRegisterClass* DstClass = TLI.getRegClassFor(DstVT);
+          ResultReg = createResultReg(DstClass);
+          
+          bool InsertedCopy = TII.copyRegToReg(*MBB, MBB->end(), ResultReg,
+                                               Op0, DstClass, SrcClass);
+          if (!InsertedCopy)
+            ResultReg = 0;
+        }
+        
+        // If the reg-reg copy failed, select a BIT_CONVERT opcode.
+        if (!ResultReg)
+          ResultReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(),
+                                 ISD::BIT_CONVERT, Op0);
+        
+        if (!ResultReg)
           return I;
         
         ValueMap[I] = ResultReg;