[llvm-commits] [llvm] r55318 - in /llvm/trunk/lib/Target/X86: X86InstrFormats.td X86InstrMMX.td

[Evan Cheng]

Are you sure? That seems highly unlikely.

Evan

On Aug 25, 2008, at 11:32 AM, Bill Wendling wrote:

> Author: void
> Date: Mon Aug 25 13:32:39 2008
> New Revision: 55318
>
> URL: http://llvm.org/viewvc/llvm-project?rev=55318&view=rev
> Log:
> Nevermind. This broke the bootstrap (?!).
>
> Modified:
>    llvm/trunk/lib/Target/X86/X86InstrFormats.td
>    llvm/trunk/lib/Target/X86/X86InstrMMX.td
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=55318&r1=55317&r2=55318&view=diff
>
> =
> =
> =
> =
> =
> =
> =
> =
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Mon Aug 25 13:32:39  
> 2008
> @@ -157,20 +157,16 @@
>
> // SSE2 Instruction Templates:
> //
> -//   SDI    - SSE2 instructions with XD prefix.
> -//   SDIi8  - SSE2 instructions with ImmT == Imm8 and XD prefix.
> -//   SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
> -//   PDI    - SSE2 instructions with TB and OpSize prefixes.
> -//   PDIi8  - SSE2 instructions with ImmT == Imm8 and TB and OpSize  
> prefixes.
> +//   SDI   - SSE2 instructions with XD prefix.
> +//   SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
> +//   PDI   - SSE2 instructions with TB and OpSize prefixes.
> +//   PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize  
> prefixes.
>
> class SDI<bits<8> o, Format F, dag outs, dag ins, string asm,  
> list<dag> pattern>
>       : I<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
> class SDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
>             list<dag> pattern>
>       : Ii8<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
> -class SSDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
> -             list<dag> pattern>
> -      : Ii8<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE2]>;
> class PDI<bits<8> o, Format F, dag outs, dag ins, string asm,  
> list<dag> pattern>
>       : I<o, F, outs, ins, asm, pattern>, TB, OpSize,  
> Requires<[HasSSE2]>;
> class PDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=55318&r1=55317&r2=55318&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Mon Aug 25 13:32:39 2008
> @@ -173,15 +173,15 @@
>                         "movq\t{$src, $dst|$dst, $src}",
>                         [(store (v1i64 VR64:$src), addr:$dst)]>;
>
> -def MMX_MOVDQ2Qrr : SDIi8<0xD6, MRMDestMem, (outs VR64:$dst), (ins  
> VR128:$src),
> +def MMX_MOVDQ2Qrr : MMXID<0xD6, MRMDestMem, (outs VR64:$dst), (ins  
> VR128:$src),
>                           "movdq2q\t{$src, $dst|$dst, $src}",
>                           [(set VR64:$dst,
>                             (v1i64 (bitconvert
>                             (i64 (vector_extract (v2i64 VR128:$src),
>                                   (iPTR 0))))))]>;
>
> -def MMX_MOVQ2DQrr : SSDIi8<0xD6, MRMDestMem, (outs VR128:$dst),  
> (ins VR64:$src),
> -                           "movq2dq\t{$src, $dst|$dst, $src}",
> +def MMX_MOVQ2DQrr : MMXIS<0xD6, MRMDestMem, (outs VR128:$dst), (ins  
> VR64:$src),
> +                          "movq2dq\t{$src, $dst|$dst, $src}",
>           [(set VR128:$dst,
>                 (v2i64 (vector_shuffle immAllZerosV,
>                         (v2i64 (scalar_to_vector (i64 (bitconvert  
> VR64:$src)))),
>
>
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