[llvm-commits] [llvm] r55345 - in /llvm/trunk: include/llvm/CodeGen/FastISel.h lib/CodeGen/SelectionDAG/FastISel.cpp utils/TableGen/FastISelEmitter.cpp
Owen Anderson
resistor at mac.com
Mon Aug 25 16:58:22 PDT 2008
Author: resistor
Date: Mon Aug 25 18:58:18 2008
New Revision: 55345
URL: http://llvm.org/viewvc/llvm-project?rev=55345&view=rev
Log:
Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
type down. This is not currently used.
Modified:
llvm/trunk/include/llvm/CodeGen/FastISel.h
llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/trunk/utils/TableGen/FastISelEmitter.cpp
Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=55345&r1=55344&r2=55345&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Mon Aug 25 18:58:18 2008
@@ -64,6 +64,7 @@
/// to request that an instruction with the given type and opcode
/// be emitted.
virtual unsigned FastEmit_(MVT::SimpleValueType VT,
+ MVT::SimpleValueType RetVT,
ISD::NodeType Opcode);
/// FastEmit_r - This method is called by target-independent code
@@ -71,6 +72,7 @@
/// register operand be emitted.
///
virtual unsigned FastEmit_r(MVT::SimpleValueType VT,
+ MVT::SimpleValueType RetVT,
ISD::NodeType Opcode, unsigned Op0);
/// FastEmit_rr - This method is called by target-independent code
@@ -78,6 +80,7 @@
/// register operands be emitted.
///
virtual unsigned FastEmit_rr(MVT::SimpleValueType VT,
+ MVT::SimpleValueType RetVT,
ISD::NodeType Opcode,
unsigned Op0, unsigned Op1);
@@ -86,6 +89,7 @@
/// register and immediate operands be emitted.
///
virtual unsigned FastEmit_ri(MVT::SimpleValueType VT,
+ MVT::SimpleValueType RetVT,
ISD::NodeType Opcode,
unsigned Op0, uint64_t Imm);
@@ -94,6 +98,7 @@
/// register and immediate operands be emitted.
///
virtual unsigned FastEmit_rri(MVT::SimpleValueType VT,
+ MVT::SimpleValueType RetVT,
ISD::NodeType Opcode,
unsigned Op0, unsigned Op1, uint64_t Imm);
@@ -110,6 +115,7 @@
/// to request that an instruction with the given type, opcode, and
/// immediate operand be emitted.
virtual unsigned FastEmit_i(MVT::SimpleValueType VT,
+ MVT::SimpleValueType RetVT,
ISD::NodeType Opcode,
uint64_t Imm);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=55345&r1=55344&r2=55345&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Mon Aug 25 18:58:18 2008
@@ -55,7 +55,8 @@
// Unhandled operand. Halt "fast" selection and bail.
return false;
- unsigned ResultReg = FastEmit_rr(VT.getSimpleVT(), ISDOpcode, Op0, Op1);
+ unsigned ResultReg = FastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(),
+ ISDOpcode, Op0, Op1);
if (ResultReg == 0)
// Target-specific code wasn't able to find a machine opcode for
// the given ISD opcode and type. Halt "fast" selection and bail.
@@ -117,9 +118,9 @@
// it.
MVT IdxVT = MVT::getMVT(Idx->getType(), /*HandleUnknown=*/false);
if (IdxVT.bitsLT(VT))
- IdxN = FastEmit_r(VT, ISD::SIGN_EXTEND, IdxN);
+ IdxN = FastEmit_r(VT, VT, ISD::SIGN_EXTEND, IdxN);
else if (IdxVT.bitsGT(VT))
- IdxN = FastEmit_r(VT, ISD::TRUNCATE, IdxN);
+ IdxN = FastEmit_r(VT, VT, ISD::TRUNCATE, IdxN);
if (IdxN == 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
@@ -129,7 +130,7 @@
if (IdxN == 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
- N = FastEmit_rr(VT, ISD::ADD, N, IdxN);
+ N = FastEmit_rr(VT, VT, ISD::ADD, N, IdxN);
if (N == 0)
// Unhandled operand. Halt "fast" selection and bail.
return false;
@@ -228,7 +229,8 @@
if (ConstantInt* CI = dyn_cast<ConstantInt>(I->getOperand(0))) {
if (I->getType()->isInteger()) {
MVT VT = MVT::getMVT(I->getType(), /*HandleUnknown=*/false);
- ValueMap[I] = FastEmit_i(VT.getSimpleVT(), ISD::Constant,
+ ValueMap[I] = FastEmit_i(VT.getSimpleVT(), VT.getSimpleVT(),
+ ISD::Constant,
CI->getZExtValue());
break;
} else
@@ -286,31 +288,34 @@
FastISel::~FastISel() {}
-unsigned FastISel::FastEmit_(MVT::SimpleValueType, ISD::NodeType) {
+unsigned FastISel::FastEmit_(MVT::SimpleValueType, MVT::SimpleValueType, ISD::NodeType) {
return 0;
}
-unsigned FastISel::FastEmit_r(MVT::SimpleValueType, ISD::NodeType,
- unsigned /*Op0*/) {
+unsigned FastISel::FastEmit_r(MVT::SimpleValueType, MVT::SimpleValueType,
+ ISD::NodeType, unsigned /*Op0*/) {
return 0;
}
-unsigned FastISel::FastEmit_rr(MVT::SimpleValueType, ISD::NodeType,
- unsigned /*Op0*/, unsigned /*Op0*/) {
+unsigned FastISel::FastEmit_rr(MVT::SimpleValueType, MVT::SimpleValueType,
+ ISD::NodeType, unsigned /*Op0*/,
+ unsigned /*Op0*/) {
return 0;
}
-unsigned FastISel::FastEmit_i(MVT::SimpleValueType, ISD::NodeType,
- uint64_t /*Imm*/) {
+unsigned FastISel::FastEmit_i(MVT::SimpleValueType, MVT::SimpleValueType,
+ ISD::NodeType, uint64_t /*Imm*/) {
return 0;
}
-unsigned FastISel::FastEmit_ri(MVT::SimpleValueType, ISD::NodeType,
- unsigned /*Op0*/, uint64_t /*Imm*/) {
+unsigned FastISel::FastEmit_ri(MVT::SimpleValueType, MVT::SimpleValueType,
+ ISD::NodeType, unsigned /*Op0*/,
+ uint64_t /*Imm*/) {
return 0;
}
-unsigned FastISel::FastEmit_rri(MVT::SimpleValueType, ISD::NodeType,
+unsigned FastISel::FastEmit_rri(MVT::SimpleValueType, MVT::SimpleValueType,
+ ISD::NodeType,
unsigned /*Op0*/, unsigned /*Op1*/,
uint64_t /*Imm*/) {
return 0;
@@ -326,13 +331,13 @@
unsigned ResultReg = 0;
// First check if immediate type is legal. If not, we can't use the ri form.
if (TLI.getOperationAction(ISD::Constant, ImmType) == TargetLowering::Legal)
- ResultReg = FastEmit_ri(VT, Opcode, Op0, Imm);
+ ResultReg = FastEmit_ri(VT, VT, Opcode, Op0, Imm);
if (ResultReg != 0)
return ResultReg;
- unsigned MaterialReg = FastEmit_i(ImmType, ISD::Constant, Imm);
+ unsigned MaterialReg = FastEmit_i(ImmType, ImmType, ISD::Constant, Imm);
if (MaterialReg == 0)
return 0;
- return FastEmit_rr(VT, Opcode, Op0, MaterialReg);
+ return FastEmit_rr(VT, VT, Opcode, Op0, MaterialReg);
}
unsigned FastISel::createResultReg(const TargetRegisterClass* RC) {
Modified: llvm/trunk/utils/TableGen/FastISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/FastISelEmitter.cpp?rev=55345&r1=55344&r2=55345&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/FastISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/FastISelEmitter.cpp Mon Aug 25 18:58:18 2008
@@ -268,14 +268,16 @@
OS << " unsigned FastEmit_" << getLegalCName(Opcode)
<< "_" << getLegalCName(getName(VT)) << "_";
Operands.PrintManglingSuffix(OS);
- OS << "(";
+ OS << "(MVT::SimpleValueType RetVT";
+ if (!Operands.empty())
+ OS << ", ";
Operands.PrintParameters(OS);
OS << ");\n";
}
OS << " unsigned FastEmit_" << getLegalCName(Opcode) << "_";
Operands.PrintManglingSuffix(OS);
- OS << "(MVT::SimpleValueType VT";
+ OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT";
if (!Operands.empty())
OS << ", ";
Operands.PrintParameters(OS);
@@ -284,7 +286,7 @@
OS << " unsigned FastEmit_";
Operands.PrintManglingSuffix(OS);
- OS << "(MVT::SimpleValueType VT, ISD::NodeType Opcode";
+ OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT, ISD::NodeType Opcode";
if (!Operands.empty())
OS << ", ";
Operands.PrintParameters(OS);
@@ -341,7 +343,9 @@
<< getLegalCName(Opcode)
<< "_" << getLegalCName(getName(VT)) << "_";
Operands.PrintManglingSuffix(OS);
- OS << "(";
+ OS << "(MVT::SimpleValueType RetVT";
+ if (!Operands.empty())
+ OS << ", ";
Operands.PrintParameters(OS);
OS << ") {\n";
@@ -382,7 +386,7 @@
OS << "unsigned FastISel::FastEmit_"
<< getLegalCName(Opcode) << "_";
Operands.PrintManglingSuffix(OS);
- OS << "(MVT::SimpleValueType VT";
+ OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT";
if (!Operands.empty())
OS << ", ";
Operands.PrintParameters(OS);
@@ -395,7 +399,9 @@
OS << " case " << TypeName << ": return FastEmit_"
<< getLegalCName(Opcode) << "_" << getLegalCName(TypeName) << "_";
Operands.PrintManglingSuffix(OS);
- OS << "(";
+ OS << "(RetVT";
+ if (!Operands.empty())
+ OS << ", ";
Operands.PrintArguments(OS);
OS << ");\n";
}
@@ -412,7 +418,7 @@
// on opcode and type.
OS << "unsigned FastISel::FastEmit_";
Operands.PrintManglingSuffix(OS);
- OS << "(MVT::SimpleValueType VT, ISD::NodeType Opcode";
+ OS << "(MVT::SimpleValueType VT, MVT::SimpleValueType RetVT, ISD::NodeType Opcode";
if (!Operands.empty())
OS << ", ";
Operands.PrintParameters(OS);
@@ -425,7 +431,7 @@
OS << " case " << Opcode << ": return FastEmit_"
<< getLegalCName(Opcode) << "_";
Operands.PrintManglingSuffix(OS);
- OS << "(VT";
+ OS << "(VT, RetVT";
if (!Operands.empty())
OS << ", ";
Operands.PrintArguments(OS);
More information about the llvm-commits
mailing list