[llvm-commits] [llvm] r55128 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp

[Anton Korobeynikov]

Author: asl
Date: Thu Aug 21 12:33:01 2008
New Revision: 55128

URL: http://llvm.org/viewvc/llvm-project?rev=55128&view=rev
Log:
Allow inline asm nodes with empty bodies inside JIT.
This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)

Modified:
    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp

Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=55128&r1=55127&r2=55128&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Thu Aug 21 12:33:01 2008
@@ -486,9 +486,13 @@
     default: 
       assert(0 && "psuedo instructions should be removed before code emission");
       break;
-    case TargetInstrInfo::INLINEASM:
-      assert(0 && "JIT does not support inline asm!\n");
+    case TargetInstrInfo::INLINEASM: {
+      const char* Value = MI.getOperand(0).getSymbolName();
+      /* We allow inline assembler nodes with empty bodies - they can
+         implicitly define registers, which is ok for JIT. */
+      assert((Value[0] == 0) && "JIT does not support inline asm!\n");
       break;
+    }
     case TargetInstrInfo::DBG_LABEL:
     case TargetInstrInfo::EH_LABEL:
       MCE.emitLabel(MI.getOperand(0).getImm());