[llvm-commits] [llvm] r55071 - /llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

[Dan Gohman]

Author: djg
Date: Wed Aug 20 13:10:48 2008
New Revision: 55071

URL: http://llvm.org/viewvc/llvm-project?rev=55071&view=rev
Log:
Minor code reorganization.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=55071&r1=55070&r2=55071&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Wed Aug 20 13:10:48 2008
@@ -146,8 +146,8 @@
 unsigned FastISel::FastEmitInst_(unsigned MachineInstOpcode,
                                  const TargetRegisterClass* RC) {
   MachineRegisterInfo &MRI = MF->getRegInfo();
-  const TargetInstrDesc &II = TII->get(MachineInstOpcode);
   unsigned ResultReg = MRI.createVirtualRegister(RC);
+  const TargetInstrDesc &II = TII->get(MachineInstOpcode);
 
   MachineInstr *MI = BuildMI(*MF, II, ResultReg);
 
@@ -159,8 +159,8 @@
                                   const TargetRegisterClass *RC,
                                   unsigned Op0) {
   MachineRegisterInfo &MRI = MF->getRegInfo();
-  const TargetInstrDesc &II = TII->get(MachineInstOpcode);
   unsigned ResultReg = MRI.createVirtualRegister(RC);
+  const TargetInstrDesc &II = TII->get(MachineInstOpcode);
 
   MachineInstr *MI = BuildMI(*MF, II, ResultReg);
   MI->addOperand(MachineOperand::CreateReg(Op0, false));
@@ -173,8 +173,8 @@
                                    const TargetRegisterClass *RC,
                                    unsigned Op0, unsigned Op1) {
   MachineRegisterInfo &MRI = MF->getRegInfo();
-  const TargetInstrDesc &II = TII->get(MachineInstOpcode);
   unsigned ResultReg = MRI.createVirtualRegister(RC);
+  const TargetInstrDesc &II = TII->get(MachineInstOpcode);
 
   MachineInstr *MI = BuildMI(*MF, II, ResultReg);
   MI->addOperand(MachineOperand::CreateReg(Op0, false));