[llvm-commits] [llvm] r55006 - /llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

[Dan Gohman]

Author: djg
Date: Tue Aug 19 15:46:54 2008
New Revision: 55006

URL: http://llvm.org/viewvc/llvm-project?rev=55006&view=rev
Log:
Use the BuildMI overload that sets up a destination register
instead of the one that doesn't and then adding it manually.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=55006&r1=55005&r2=55006&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Tue Aug 19 15:46:54 2008
@@ -70,10 +70,9 @@
                                     const TargetRegisterClass* RC) {
   MachineRegisterInfo &MRI = MF->getRegInfo();
   const TargetInstrDesc &II = TII->get(MachineInstOpcode);
-  MachineInstr *MI = BuildMI(*MF, II);
   unsigned ResultReg = MRI.createVirtualRegister(RC);
 
-  MI->addOperand(MachineOperand::CreateReg(ResultReg, true));
+  MachineInstr *MI = BuildMI(*MF, II, ResultReg);
 
   MBB->push_back(MI);
   return ResultReg;
@@ -84,10 +83,9 @@
                                   unsigned Op0) {
   MachineRegisterInfo &MRI = MF->getRegInfo();
   const TargetInstrDesc &II = TII->get(MachineInstOpcode);
-  MachineInstr *MI = BuildMI(*MF, II);
   unsigned ResultReg = MRI.createVirtualRegister(RC);
 
-  MI->addOperand(MachineOperand::CreateReg(ResultReg, true));
+  MachineInstr *MI = BuildMI(*MF, II, ResultReg);
   MI->addOperand(MachineOperand::CreateReg(Op0, false));
 
   MBB->push_back(MI);
@@ -99,10 +97,9 @@
                                    unsigned Op0, unsigned Op1) {
   MachineRegisterInfo &MRI = MF->getRegInfo();
   const TargetInstrDesc &II = TII->get(MachineInstOpcode);
-  MachineInstr *MI = BuildMI(*MF, II);
   unsigned ResultReg = MRI.createVirtualRegister(RC);
 
-  MI->addOperand(MachineOperand::CreateReg(ResultReg, true));
+  MachineInstr *MI = BuildMI(*MF, II, ResultReg);
   MI->addOperand(MachineOperand::CreateReg(Op0, false));
   MI->addOperand(MachineOperand::CreateReg(Op1, false));