[llvm-commits] [llvm] r54906 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
Nick Lewycky
nicholas at mxc.ca
Sun Aug 17 12:58:25 PDT 2008
Author: nicholas
Date: Sun Aug 17 14:58:24 2008
New Revision: 54906
URL: http://llvm.org/viewvc/llvm-project?rev=54906&view=rev
Log:
Consider the case where xor by -1 and xor by 128 have been combined already to
produce an xor by 127.
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
llvm/trunk/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=54906&r1=54905&r2=54906&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sun Aug 17 14:58:24 2008
@@ -5503,8 +5503,8 @@
return new ICmpInst(I.getPredicate(), Op0I->getOperand(0),
Op1I->getOperand(0));
} else {
- // icmp u/s (a ^ signbit), (b ^ signbit) --> icmp s/u a, b
if (ConstantInt *CI = dyn_cast<ConstantInt>(Op0I->getOperand(1))) {
+ // icmp u/s (a ^ signbit), (b ^ signbit) --> icmp s/u a, b
if (CI->getValue().isSignBit()) {
ICmpInst::Predicate Pred = I.isSignedPredicate()
? I.getUnsignedPredicate()
@@ -5512,6 +5512,17 @@
return new ICmpInst(Pred, Op0I->getOperand(0),
Op1I->getOperand(0));
}
+
+ // icmp u/s (a ^ ~signbit), (b ^ ~signbit) --> icmp s/u b, a
+ if ((~CI->getValue()).isSignBit()) {
+ ICmpInst::Predicate Pred = I.isSignedPredicate()
+ ? I.getUnsignedPredicate()
+ : I.getSignedPredicate();
+ Pred = I.getSwappedPredicate(Pred);
+ return new ICmpInst(Pred, Op0I->getOperand(0),
+ Op1I->getOperand(0));
+
+ }
}
}
break;
@@ -5818,6 +5829,17 @@
return new ICmpInst(Pred, LHSI->getOperand(0),
ConstantInt::get(RHSV ^ SignBit));
}
+
+ // (icmp u/s (xor A ~SignBit), C) -> (icmp ~s/u A, (xor C ~SignBit))
+ if (!ICI.isEquality() && (~XorCST->getValue()).isSignBit()) {
+ const APInt &NotSignBit = XorCST->getValue();
+ ICmpInst::Predicate Pred = ICI.isSignedPredicate()
+ ? ICI.getUnsignedPredicate()
+ : ICI.getSignedPredicate();
+ Pred = ICI.getSwappedPredicate(Pred);
+ return new ICmpInst(Pred, LHSI->getOperand(0),
+ ConstantInt::get(RHSV ^ NotSignBit));
+ }
}
break;
case Instruction::And: // (icmp pred (and X, AndCST), RHS)
Modified: llvm/trunk/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll?rev=54906&r1=54905&r2=54906&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/2008-08-17-ICmpXorSignbit.ll Sun Aug 17 14:58:24 2008
@@ -20,3 +20,22 @@
ret i1 %tmp
}
+define i1 @test4(i8 %x, i8 %y) {
+ %X = xor i8 %x, 127
+ %Y = xor i8 %y, 127
+ %tmp = icmp slt i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test5(i8 %x, i8 %y) {
+ %X = xor i8 %x, 127
+ %Y = xor i8 %y, 127
+ %tmp = icmp ult i8 %X, %Y
+ ret i1 %tmp
+}
+
+define i1 @test6(i8 %x) {
+ %X = xor i8 %x, 127
+ %tmp = icmp uge i8 %X, 15
+ ret i1 %tmp
+}
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