[llvm-commits] [llvm] r54510 - in /llvm/trunk/test/CodeGen/Mips: 2008-07-29-icmp.ll 2008-07-31-fcopysign.ll 2008-08-01-AsmInline.ll

[Bruno Cardoso Lopes]

Author: bruno
Date: Thu Aug  7 23:09:57 2008
New Revision: 54510

URL: http://llvm.org/viewvc/llvm-project?rev=54510&view=rev
Log:
Batch 5 of Mips CodeGen tests

Added:
    llvm/trunk/test/CodeGen/Mips/2008-07-29-icmp.ll
    llvm/trunk/test/CodeGen/Mips/2008-07-31-fcopysign.ll
    llvm/trunk/test/CodeGen/Mips/2008-08-01-AsmInline.ll

Added: llvm/trunk/test/CodeGen/Mips/2008-07-29-icmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-29-icmp.ll?rev=54510&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-29-icmp.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-29-icmp.ll Thu Aug  7 23:09:57 2008
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips | \
+; RUN: grep {b\[ne\]\[eq\]} | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @A(float %a, float %b, i32 %j) nounwind {
+entry:
+	icmp sgt i32 %j, 1		; <i1>:0 [#uses=1]
+	%.0 = select i1 %0, float %a, float %b		; <float> [#uses=1]
+	ret float %.0
+}

Added: llvm/trunk/test/CodeGen/Mips/2008-07-31-fcopysign.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-31-fcopysign.ll?rev=54510&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-31-fcopysign.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-31-fcopysign.ll Thu Aug  7 23:09:57 2008
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
+; RUN: grep abs.s  %t | count 1
+; RUN: grep neg.s %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define float @A(float %i, float %j) nounwind  {
+entry:
+	tail call float @copysignf( float %i, float %j ) nounwind readnone 		; <float>:0 [#uses=1]
+	ret float %0
+}
+
+declare float @copysignf(float, float) nounwind readnone 

Added: llvm/trunk/test/CodeGen/Mips/2008-08-01-AsmInline.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-08-01-AsmInline.ll?rev=54510&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-08-01-AsmInline.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/2008-08-01-AsmInline.ll Thu Aug  7 23:09:57 2008
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t 
+; RUN: grep mfhi  %t | count 1
+; RUN: grep mflo  %t | count 1
+; RUN: grep multu %t | count 1
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+	%struct.DWstruct = type { i32, i32 }
+
+define i32 @A0(i32 %u, i32 %v) nounwind  {
+entry:
+	%asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwind
+	%asmresult = extractvalue %struct.DWstruct %asmtmp, 0
+	%asmresult1 = extractvalue %struct.DWstruct %asmtmp, 1		; <i32> [#uses=1]
+  %res = add i32 %asmresult, %asmresult1
+	ret i32 %res
+}