[llvm-commits] [llvm-gcc-4.2] r54277 - in /llvm-gcc-4.2/trunk/gcc/config/arm: arm.c ieee754-df.S ieee754-sf.S lib1funcs.asm
Bill Wendling
isanbard at gmail.com
Sat Aug 2 21:04:13 PDT 2008
Author: void
Date: Sat Aug 2 23:04:12 2008
New Revision: 54277
URL: http://llvm.org/viewvc/llvm-project?rev=54277&view=rev
Log:
- ARM 4702983 Thumb VFP math
- More compact switch tables support
- Function alignment
Modified:
llvm-gcc-4.2/trunk/gcc/config/arm/arm.c
llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-df.S
llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-sf.S
llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm
Modified: llvm-gcc-4.2/trunk/gcc/config/arm/arm.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/arm.c?rev=54277&r1=54276&r2=54277&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/arm.c (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/arm.c Sat Aug 2 23:04:12 2008
@@ -9358,8 +9358,10 @@
if (GET_CODE (insn) == BARRIER)
push_minipool_barrier (insn, address);
+ /* APPLE LOCAL begin ARM 6008578 */
else if (LABEL_P (insn))
address += get_label_pad (insn, address);
+ /* APPLE LOCAL end ARM 6008578 */
else if (INSN_P (insn))
{
rtx table;
Modified: llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-df.S
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-df.S?rev=54277&r1=54276&r2=54277&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-df.S (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-df.S Sat Aug 2 23:04:12 2008
@@ -1382,3 +1382,256 @@
FUNC_END truncdfsf2
#endif /* L_truncdfsf2 */
+
+/* APPLE LOCAL begin ARM 4702983 Thumb VFP math */
+#ifndef NOT_DARWIN
+#if __ARM_ARCH__ > 5
+#ifdef L_muldf3vfp
+
+ARM_FUNC_START muldf3vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fmuld d5, d6, d7
+ fmrrd r0, r1, d5
+ RET
+
+ FUNC_END muldf3vfp
+
+#endif
+
+#ifdef L_adddf3vfp
+
+ARM_FUNC_START adddf3vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ faddd d5, d6, d7
+ fmrrd r0, r1, d5
+ RET
+
+ FUNC_END adddf3vfp
+
+#endif
+
+#ifdef L_subdf3vfp
+
+ARM_FUNC_START subdf3vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fsubd d5, d6, d7
+ fmrrd r0, r1, d5
+ RET
+
+ FUNC_END subdf3vfp
+
+#endif
+
+#ifdef L_divdf3vfp
+
+ARM_FUNC_START divdf3vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fdivd d5, d6, d7
+ fmrrd r0, r1, d5
+ RET
+
+ FUNC_END divdf3vfp
+
+#endif
+
+#ifdef L_eqdf2vfp
+
+ARM_FUNC_START eqdf2vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fcmpd d6, d7
+ fmstat
+ movne r0, #0
+ moveq r0, #1
+ RET
+
+ FUNC_END eqdf2vfp
+
+#endif
+
+#ifdef L_nedf2vfp
+
+ARM_FUNC_START nedf2vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fcmpd d6, d7
+ fmstat
+ moveq r0, #0
+ movne r0, #1
+ RET
+
+ FUNC_END nedf2vfp
+
+#endif
+
+#ifdef L_ltdf2vfp
+
+ARM_FUNC_START ltdf2vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fcmpd d6, d7
+ fmstat
+ movpl r0, #0
+ movmi r0, #1
+ RET
+
+ FUNC_END ltdf2vfp
+
+#endif
+
+#ifdef L_gtdf2vfp
+
+ARM_FUNC_START gtdf2vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fcmpd d6, d7
+ fmstat
+ movle r0, #0
+ movgt r0, #1
+ RET
+
+ FUNC_END gtdf2vfp
+
+#endif
+
+#ifdef L_ledf2vfp
+
+ARM_FUNC_START ledf2vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fcmpd d6, d7
+ fmstat
+ movhi r0, #0
+ movls r0, #1
+ RET
+
+ FUNC_END ledf2vfp
+
+#endif
+
+#ifdef L_gedf2vfp
+
+ARM_FUNC_START gedf2vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fcmpd d6, d7
+ fmstat
+ movlt r0, #0
+ movge r0, #1
+ RET
+
+ FUNC_END gedf2vfp
+
+#endif
+
+#ifdef L_unorddf2vfp
+
+ARM_FUNC_START unorddf2vfp
+
+ fmdrr d6, r0, r1
+ fmdrr d7, r2, r3
+ fcmpd d6, d7
+ fmstat
+ movvc r0, #0
+ movvs r0, #1
+ RET
+
+ FUNC_END unorddf2vfp
+
+#endif
+
+#ifdef L_fixdfsivfp
+
+ARM_FUNC_START fixdfsivfp
+
+ fmdrr d7, r0, r1
+ ftosizd s15, d7
+ fmrs r0, s15
+ RET
+
+ FUNC_END fixdfsivfp
+
+#endif
+
+#ifdef L_fixunsdfsivfp
+
+ARM_FUNC_START fixunsdfsivfp
+
+ fmdrr d7, r0, r1
+ ftouizd s15, d7
+ fmrs r0, s15
+ RET
+
+ FUNC_END fixunsdfsivfp
+
+#endif
+
+#ifdef L_extendsfdf2vfp
+
+ARM_FUNC_START extendsfdf2vfp
+
+ fmsr s15, r0
+ fcvtds d7, s15
+ fmrrd r0, r1, d7
+ RET
+
+ FUNC_END extendsfdf2vfp
+
+#endif
+
+#ifdef L_truncdfsf2vfp
+
+ARM_FUNC_START truncdfsf2vfp
+
+ fmdrr d7, r0, r1
+ fcvtsd s15, d7
+ fmrs r0, s15
+ RET
+
+ FUNC_END truncdfsf2vfp
+
+#endif
+
+#ifdef L_floatsidfvfp
+
+ARM_FUNC_START floatsidfvfp
+
+ fmsr s15, r0
+ fsitod d7, s15
+ fmrrd r0, r1, d7
+ RET
+
+ FUNC_END floatsidfvfp
+
+#endif
+
+#ifdef L_floatsidfvfp
+
+ARM_FUNC_START floatunssidfvfp
+
+ fmsr s15, r0
+ fuitod d7, s15
+ fmrrd r0, r1, d7
+ RET
+
+ FUNC_END floatunssidfvfp
+
+#endif
+
+#endif /* __ARM_ARCH__ > 5 */
+#endif /* NOT_DARWIN */
+/* APPLE LOCAL end ARM 4702983 Thumb VFP math */
Modified: llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-sf.S
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-sf.S?rev=54277&r1=54276&r2=54277&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-sf.S (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/ieee754-sf.S Sat Aug 2 23:04:12 2008
@@ -994,3 +994,230 @@
FUNC_END fixunssfsi
#endif /* L_fixunssfsi */
+
+/* APPLE LOCAL begin ARM 4702983 Thumb VFP math */
+#ifndef NOT_DARWIN
+#if __ARM_ARCH__ > 5
+#ifdef L_mulsf3vfp
+
+ARM_FUNC_START mulsf3vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fmuls s13, s14, s15
+ fmrs r0, s13
+ RET
+
+ FUNC_END mulsf3vfp
+
+#endif
+
+#ifdef L_addsf3vfp
+
+ARM_FUNC_START addsf3vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fadds s13, s14, s15
+ fmrs r0, s13
+ RET
+
+ FUNC_END addsf3vfp
+
+#endif
+
+#ifdef L_subsf3vfp
+
+ARM_FUNC_START subsf3vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fsubs s13, s14, s15
+ fmrs r0, s13
+ RET
+
+ FUNC_END subsf3vfp
+
+#endif
+
+#ifdef L_divsf3vfp
+
+ARM_FUNC_START divsf3vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fdivs s13, s14, s15
+ fmrs r0, s13
+ RET
+
+ FUNC_END divsf3vfp
+
+#endif
+
+#ifdef L_eqsf2vfp
+
+ARM_FUNC_START eqsf2vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fcmps s14, s15
+ fmstat
+ movne r0, #0
+ moveq r0, #1
+ RET
+
+ FUNC_END eqsf2vfp
+
+#endif
+
+#ifdef L_nesf2vfp
+
+ARM_FUNC_START nesf2vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fcmps s14, s15
+ fmstat
+ moveq r0, #0
+ movne r0, #1
+ RET
+
+ FUNC_END nesf2vfp
+
+#endif
+
+#ifdef L_ltsf2vfp
+
+ARM_FUNC_START ltsf2vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fcmps s14, s15
+ fmstat
+ movpl r0, #0
+ movmi r0, #1
+ RET
+
+ FUNC_END ltsf2vfp
+
+#endif
+
+#ifdef L_gtsf2vfp
+
+ARM_FUNC_START gtsf2vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fcmps s14, s15
+ fmstat
+ movle r0, #0
+ movgt r0, #1
+ RET
+
+ FUNC_END gtsf2vfp
+
+#endif
+
+#ifdef L_lesf2vfp
+
+ARM_FUNC_START lesf2vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fcmps s14, s15
+ fmstat
+ movhi r0, #0
+ movls r0, #1
+ RET
+
+ FUNC_END lesf2vfp
+
+#endif
+
+#ifdef L_gesf2vfp
+
+ARM_FUNC_START gesf2vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fcmps s14, s15
+ fmstat
+ movlt r0, #0
+ movge r0, #1
+ RET
+
+ FUNC_END gesf2vfp
+
+#endif
+
+#ifdef L_unordsf2vfp
+
+ARM_FUNC_START unordsf2vfp
+
+ fmsr s14, r0
+ fmsr s15, r1
+ fcmps s14, s15
+ fmstat
+ movvc r0, #0
+ movvs r0, #1
+ RET
+
+ FUNC_END unordsf2vfp
+
+#endif
+
+#ifdef L_fixsfsivfp
+
+ARM_FUNC_START fixsfsivfp
+
+ fmsr s15, r0
+ ftosizs s15, s15
+ fmrs r0, s15
+ RET
+
+ FUNC_END fixsfsivfp
+
+#endif
+
+#ifdef L_fixunssfsivfp
+
+ARM_FUNC_START fixunssfsivfp
+
+ fmsr s15, r0
+ ftouizs s15, s15
+ fmrs r0, s15
+ RET
+
+ FUNC_END fixunssfsivfp
+
+#endif
+
+#ifdef L_floatsisfvfp
+
+ARM_FUNC_START floatsisfvfp
+
+ fmsr s15, r0
+ fsitos s15, s15
+ fmrs r0, s15
+ RET
+
+ FUNC_END floatsisfvfp
+
+#endif
+
+#ifdef L_floatsisfvfp
+
+ARM_FUNC_START floatunssisfvfp
+
+ fmsr s15, r0
+ fuitos s15, s15
+ fmrs r0, s15
+ RET
+
+ FUNC_END floatunssisfvfp
+
+#endif
+
+#endif /* __ARM_ARCH__ > 5 */
+#endif /* NOT_DARWIN */
+/* APPLE LOCAL end ARM 4702983 Thumb VFP math */
Modified: llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm?rev=54277&r1=54276&r2=54277&view=diff
==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm (original)
+++ llvm-gcc-4.2/trunk/gcc/config/arm/lib1funcs.asm Sat Aug 2 23:04:12 2008
@@ -345,7 +345,8 @@
.text
.globl SYM (__$0)
TYPE (__$0)
- .align 0
+ /* APPLE LOCAL ARM function alignment */
+ .align 2
.arm
SYM (__$0):
#else
@@ -1272,6 +1273,85 @@
#endif
+/* APPLE LOCAL begin ARM 4790140 compact switch tables */
+/* ----------------------------------------------------------------------- */
+/* Thumb switch table implementation. Arm code, although must be called
+ from Thumb (the low bit of LR is expected to be 1).
+ Expects the call site to be followed by 1-byte count, then <count>
+ 1-byte unsigned half-offsets (low bit of real offset is always 0, so
+ not stored), then the half-offset for the default case (not included
+ in the count). */
+
+#ifdef L_switchu8
+
+ FUNC_START switchu8
+
+ ldrb ip, [lr, #-1]
+ cmp r0, ip
+ ldrccb r0, [lr, r0]
+ ldrcsb r0, [lr, ip]
+ add ip, lr, r0, lsl #1
+ bx ip
+
+ FUNC_END switchu8
+#endif
+
+/* Same with signed half-offsets. */
+
+#ifdef L_switch8
+
+ FUNC_START switch8
+
+ ldrb ip, [lr, #-1]
+ cmp r0, ip
+ ldrccsb r0, [lr, r0]
+ ldrcssb r0, [lr, ip]
+ add ip, lr, r0, lsl #1
+ bx ip
+
+ FUNC_END switch8
+#endif
+
+/* Same with 16-bit signed half-offsets. (This one is not
+ all that efficient, there's no reg+reg<<const mode for
+ halfwords.) */
+
+#ifdef L_switch16
+
+ FUNC_START switch16
+
+ ldrh ip, [lr, #-1]
+ cmp r0, ip
+ add r0, lr, r0, lsl #1
+ ldrccsh r0, [r0, #1]
+ add ip, lr, ip, lsl #1
+ ldrcssh r0, [ip, #1]
+ add ip, lr, r0, lsl #1
+ bx ip
+
+ FUNC_END switch16
+#endif
+
+/* Same with 32-bit signed offset (shifting off the low
+ bit would not gain anything here). */
+
+#ifdef L_switch32
+
+ FUNC_START switch32
+
+ ldr ip, [lr, #-1]
+ cmp r0, ip
+ add r0, lr, r0, lsl #2
+ ldrcc r0, [r0, #3]
+ add ip, lr, ip, lsl #2
+ ldrcs r0, [ip, #3]
+ add ip, lr, r0
+ bx ip
+
+ FUNC_END switch32
+#endif
+/* APPLE LOCAL end ARM 4790140 compact switch tables */
+
#endif /* __symbian__ */
/* ------------------------------------------------------------------------ */
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