[llvm-commits] minor vector comparison patch

[Evan Cheng]

I am not a good person to review this. FP math always confuse me. :-)  
Dan, can you take a look?

Thanks,

Evan

On Jul 25, 2008, at 11:32 AM, Mon P Wang wrote:

> Hi,
>
> Here is a minor patch to add support for some floating point
> comparison cases that we missed.
>
>   -- Mon Ping
>
>
> Index: lib/Target/X86/X86ISelLowering.cpp
> ===================================================================
> --- lib/Target/X86/X86ISelLowering.cpp  (revision 54030)
> +++ lib/Target/X86/X86ISelLowering.cpp  (working copy)
> @@ -4772,6 +4772,7 @@
>
>      switch (SetCCOpcode) {
>      default: break;
> +    case ISD::SETOEQ:
>      case ISD::SETEQ:  SSECC = 0; break;
>      case ISD::SETOGT:
>      case ISD::SETGT: Swap = true; // Fallthrough
> @@ -4782,7 +4783,7 @@
>      case ISD::SETLE:
>      case ISD::SETOLE: SSECC = 2; break;
>      case ISD::SETUO:  SSECC = 3; break;
> -    case ISD::SETONE:
> +    case ISD::SETUNE:
>      case ISD::SETNE:  SSECC = 4; break;
>      case ISD::SETULE: Swap = true;
>      case ISD::SETUGE: SSECC = 5; break;
> @@ -4795,13 +4796,19 @@
>
>      // In the one special case we can't handle, emit two comparisons.
>      if (SSECC == 8) {
> -      SDOperand UNORD, EQ;
> -
> -      assert(SetCCOpcode == ISD::SETUEQ && "Illegal FP comparison");
> -
> -      UNORD = DAG.getNode(Opc, VT, Op0, Op1, DAG.getConstant(3,
> MVT::i8));
> -      EQ = DAG.getNode(Opc, VT, Op0, Op1, DAG.getConstant(0,  
> MVT::i8));
> -      return DAG.getNode(ISD::OR, VT, UNORD, EQ);
> +      if (SetCCOpcode == ISD::SETUEQ) {
> +        SDOperand UNORD, EQ;
> +        UNORD = DAG.getNode(Opc, VT, Op0, Op1, DAG.getConstant(3,
> MVT::i8));
> +        EQ = DAG.getNode(Opc, VT, Op0, Op1, DAG.getConstant(0,
> MVT::i8));
> +        return DAG.getNode(ISD::OR, VT, UNORD, EQ);
> +      }
> +      else if (SetCCOpcode == ISD::SETONE) {
> +        SDOperand ORD, NEQ;
> +        ORD = DAG.getNode(Opc, VT, Op0, Op1, DAG.getConstant(7,
> MVT::i8));
> +        NEQ = DAG.getNode(Opc, VT, Op0, Op1, DAG.getConstant(4,
> MVT::i8));
> +        return DAG.getNode(ISD::AND, VT, ORD, NEQ);
> +      }
> +      assert(0 && "Illegal FP comparison");
>      }
>      // Handle all other FP comparisons here.
>      return DAG.getNode(Opc, VT, Op0, Op1, DAG.getConstant(SSECC,
> MVT::i8));
>
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