[llvm-commits] [llvm] r53937 - in /llvm/trunk: include/llvm/CodeGen/LiveIntervalAnalysis.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/RegAllocLinearScan.cpp lib/CodeGen/SimpleRegisterCoalescing.cpp lib/CodeGen/SimpleRegisterCoalescing.h
Owen Anderson
resistor at mac.com
Tue Jul 22 15:46:50 PDT 2008
Author: resistor
Date: Tue Jul 22 17:46:49 2008
New Revision: 53937
URL: http://llvm.org/viewvc/llvm-project?rev=53937&view=rev
Log:
Change the heuristics used in the coalescer, register allocator, and within
live intervals itself to use an instruction count approximation that is
not affected by inserting empty indices.
Modified:
llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
Modified: llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h?rev=53937&r1=53936&r2=53937&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LiveIntervalAnalysis.h Tue Jul 22 17:46:49 2008
@@ -75,6 +75,9 @@
/// and MBB id.
std::vector<IdxMBBPair> Idx2MBBMap;
+ /// FunctionSize - The number of instructions present in the function
+ uint64_t FunctionSize;
+
typedef std::map<MachineInstr*, unsigned> Mi2IndexMap;
Mi2IndexMap mi2iMap_;
@@ -169,11 +172,18 @@
return MBB2IdxMap[MBBNo].second;
}
- /// getIntervalSize - get the size of an interval in "units,"
+ /// getScaledIntervalSize - get the size of an interval in "units,"
/// where every function is composed of one thousand units. This
/// measure scales properly with empty index slots in the function.
- unsigned getScaledIntervalSize(LiveInterval& I) const {
- return (1000 / InstrSlots::NUM * I.getSize()) / i2miMap_.size();
+ double getScaledIntervalSize(LiveInterval& I) {
+ return (1000.0 / InstrSlots::NUM * I.getSize()) / i2miMap_.size();
+ }
+
+ /// getApproximateInstructionCount - computes an estimate of the number
+ /// of instructions in a given LiveInterval.
+ unsigned getApproximateInstructionCount(LiveInterval& I) {
+ double IntervalPercentage = getScaledIntervalSize(I) / 1000.0;
+ return IntervalPercentage * FunctionSize;
}
/// getMBBFromIndex - given an index in any instruction of an
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=53937&r1=53936&r2=53937&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Tue Jul 22 17:46:49 2008
@@ -87,6 +87,8 @@
mi2iMap_.clear();
i2miMap_.clear();
+ FunctionSize = 0;
+
// Number MachineInstrs and MachineBasicBlocks.
// Initialize MBB indexes to a sentinal.
MBB2IdxMap.resize(mf_->getNumBlockIDs(), std::make_pair(~0U,~0U));
@@ -102,6 +104,8 @@
assert(inserted && "multiple MachineInstr -> index mappings");
i2miMap_.push_back(I);
MIIndex += InstrSlots::NUM;
+
+ FunctionSize++;
}
if (StartIdx == MIIndex) {
@@ -1789,7 +1793,7 @@
for (unsigned i = 0, e = NewLIs.size(); i != e; ++i) {
LiveInterval *LI = NewLIs[i];
if (!LI->empty()) {
- LI->weight /= LI->getSize();
+ LI->weight /= getApproximateInstructionCount(*LI);
if (!AddedKill.count(LI)) {
LiveRange *LR = &LI->ranges[LI->ranges.size()-1];
unsigned LastUseIdx = getBaseIndex(LR->end);
Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=53937&r1=53936&r2=53937&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Jul 22 17:46:49 2008
@@ -851,7 +851,8 @@
if (minWeight == HUGE_VALF) {
// All registers must have inf weight. Just grab one!
minReg = BestPhysReg ? BestPhysReg : *RC->allocation_order_begin(*mf_);
- if (cur->weight == HUGE_VALF || cur->getSize() == 1)
+ if (cur->weight == HUGE_VALF ||
+ li_->getApproximateInstructionCount(*cur) == 1)
// Spill a physical register around defs and uses.
li_->spillPhysRegAroundRegDefsUses(*cur, minReg, *vrm_);
}
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=53937&r1=53936&r2=53937&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Tue Jul 22 17:46:49 2008
@@ -851,8 +851,8 @@
// Then make sure the intervals are *short*.
LiveInterval &SrcInt = li_->getInterval(SrcReg);
LiveInterval &DstInt = li_->getInterval(DstReg);
- unsigned SrcSize = SrcInt.getSize() / InstrSlots::NUM;
- unsigned DstSize = DstInt.getSize() / InstrSlots::NUM;
+ unsigned SrcSize = li_->getApproximateInstructionCount(SrcInt);
+ unsigned DstSize = li_->getApproximateInstructionCount(DstInt);
const TargetRegisterClass *RC = mri_->getRegClass(DstReg);
unsigned Threshold = allocatableRCRegs_[RC].count() * 2;
return (SrcSize + DstSize) <= Threshold;
@@ -1011,10 +1011,10 @@
if (SubIdx) {
unsigned LargeReg = isExtSubReg ? SrcReg : DstReg;
unsigned SmallReg = isExtSubReg ? DstReg : SrcReg;
- unsigned LargeRegSize =
- li_->getInterval(LargeReg).getSize() / InstrSlots::NUM;
- unsigned SmallRegSize =
- li_->getInterval(SmallReg).getSize() / InstrSlots::NUM;
+ unsigned LargeRegSize =
+ li_->getApproximateInstructionCount(li_->getInterval(LargeReg));
+ unsigned SmallRegSize =
+ li_->getApproximateInstructionCount(li_->getInterval(SmallReg));
const TargetRegisterClass *RC = mri_->getRegClass(SmallReg);
unsigned Threshold = allocatableRCRegs_[RC].count();
// Be conservative. If both sides are virtual registers, do not coalesce
@@ -1081,7 +1081,7 @@
// If the virtual register live interval is long but it has low use desity,
// do not join them, instead mark the physical register as its allocation
// preference.
- unsigned Length = JoinVInt.getSize() / InstrSlots::NUM;
+ unsigned Length = li_->getApproximateInstructionCount(JoinVInt);
if (Length > Threshold &&
(((float)std::distance(mri_->use_begin(JoinVReg),
mri_->use_end()) / Length) < (1.0 / Threshold))) {
@@ -2196,7 +2196,7 @@
// Divide the weight of the interval by its size. This encourages
// spilling of intervals that are large and have few uses, and
// discourages spilling of small intervals with many uses.
- LI.weight /= LI.getSize();
+ LI.weight /= li_->getApproximateInstructionCount(LI);
}
}
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h?rev=53937&r1=53936&r2=53937&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.h Tue Jul 22 17:46:49 2008
@@ -126,7 +126,7 @@
unsigned getRepIntervalSize(unsigned Reg) {
if (!li_->hasInterval(Reg))
return 0;
- return li_->getInterval(Reg).getSize();
+ return li_->getApproximateInstructionCount(li_->getInterval(Reg));
}
/// print - Implement the dump method.
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