[llvm-commits] [llvm] r53506 - in /llvm/trunk: lib/Transforms/Scalar/InstructionCombining.cpp test/Transforms/InstCombine/2008-07-11-RemAnd.ll

[Nick Lewycky]

Author: nicholas
Date: Sat Jul 12 00:04:38 2008
New Revision: 53506

URL: http://llvm.org/viewvc/llvm-project?rev=53506&view=rev
Log:
Enhance analysis of srem.

Remove dead code analyzing urem. 'urem' of power-of-2 is canonicalized to an
'and' instruction.

Added:
    llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
Modified:
    llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp

Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=53506&r1=53505&r2=53506&view=diff

==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Sat Jul 12 00:04:38 2008
@@ -1254,6 +1254,9 @@
     if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
       APInt RA = Rem->getValue();
       if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
+        if (DemandedMask.ule(RA))    // srem won't affect demanded bits
+          return UpdateValueUsesWith(I, I->getOperand(0));
+
         APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
         APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
         if (SimplifyDemandedBits(I->getOperand(0), Mask2,
@@ -1273,21 +1276,6 @@
     }
     break;
   case Instruction::URem: {
-    if (ConstantInt *Rem = dyn_cast<ConstantInt>(I->getOperand(1))) {
-      APInt RA = Rem->getValue();
-      if (RA.isPowerOf2()) {
-        APInt LowBits = (RA - 1);
-        APInt Mask2 = LowBits & DemandedMask;
-        KnownZero |= ~LowBits & DemandedMask;
-        if (SimplifyDemandedBits(I->getOperand(0), Mask2,
-                                 KnownZero, KnownOne, Depth+1))
-          return true;
-
-        assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 
-        break;
-      }
-    }
-
     APInt KnownZero2(BitWidth, 0), KnownOne2(BitWidth, 0);
     APInt AllOnes = APInt::getAllOnesValue(BitWidth);
     if (SimplifyDemandedBits(I->getOperand(0), AllOnes,

Added: llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll?rev=53506&view=auto

==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/2008-07-11-RemAnd.ll Sat Jul 12 00:04:38 2008
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | not grep rem
+; PR2330
+
+define i32 @a(i32 %b) nounwind  {
+entry:
+	srem i32 %b, 8		; <i32>:0 [#uses=1]
+	and i32 %0, 1		; <i32>:1 [#uses=1]
+	ret i32 %1
+}