[llvm-commits] [llvm] r52945 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/Target/TargetRegisterInfo.cpp utils/TableGen/RegisterInfoEmitter.cpp

[Owen Anderson]

Author: resistor
Date: Mon Jun 30 19:18:52 2008
New Revision: 52945

URL: http://llvm.org/viewvc/llvm-project?rev=52945&view=rev
Log:
Replace the dynamically computed std::set lookup method for subregisters with a hashtable-based
version that is computed by tblgen at the time LLVM is compiled.

Modified:
    llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
    llvm/trunk/lib/Target/TargetRegisterInfo.cpp
    llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp

Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=52945&r1=52944&r2=52945&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Mon Jun 30 19:18:52 2008
@@ -274,6 +274,9 @@
 /// descriptor.
 ///
 class TargetRegisterInfo {
+protected:
+  unsigned* SubregHash;
+  unsigned SubregHashSize;
 public:
   typedef const TargetRegisterClass * const * regclass_iterator;
 private:
@@ -283,7 +286,6 @@
   regclass_iterator RegClassBegin, RegClassEnd;   // List of regclasses
 
   int CallFrameSetupOpcode, CallFrameDestroyOpcode;
-  std::set<std::pair<unsigned, unsigned> > Subregs;
 protected:
   TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
                      regclass_iterator RegClassBegin,
@@ -410,7 +412,19 @@
   /// isSubRegister - Returns true if regB is a sub-register of regA.
   ///
   bool isSubRegister(unsigned regA, unsigned regB) const {
-    return Subregs.count(std::make_pair(regA, regB));
+    // SubregHash is a simple quadratically probed hash table.
+    size_t index = (regA + regB * 37) % SubregHashSize;
+    unsigned ProbeAmt = 2;
+    while (SubregHash[index*2] != 0 &&
+           SubregHash[index*2+1] != 0) {
+      if (SubregHash[index*2] == regA && SubregHash[index*2+1] == regB)
+        return true;
+      
+      index = (index + ProbeAmt) % SubregHashSize;
+      ProbeAmt += 2;
+    }
+    
+    return false;
   }
 
   /// isSuperRegister - Returns true if regB is a super-register of regA.

Modified: llvm/trunk/lib/Target/TargetRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetRegisterInfo.cpp?rev=52945&r1=52944&r2=52945&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetRegisterInfo.cpp Mon Jun 30 19:18:52 2008
@@ -29,16 +29,6 @@
 
   CallFrameSetupOpcode   = CFSO;
   CallFrameDestroyOpcode = CFDO;
-  
-  for (unsigned i = 0; i < NumRegs; ++i) {
-    const TargetRegisterDesc* CurrReg = Desc + i;
-    
-    // Initialize the Subregs set, which stores pairs (a, b) where
-    // b is a subreg of a.
-    if (CurrReg->SubRegs)
-      for (const unsigned* CurrSR = CurrReg->SubRegs; *CurrSR; ++CurrSR)
-        Subregs.insert(std::make_pair(i, *CurrSR));
-  }
 }
 
 TargetRegisterInfo::~TargetRegisterInfo() {}

Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=52945&r1=52944&r2=52945&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Mon Jun 30 19:18:52 2008
@@ -462,6 +462,70 @@
                      RegisterAliases);
     }
   }
+  
+  // Print the SubregHashTable, a simple quadratically probed
+  // hash table for determining if a register is a subregister
+  // of another register.
+  unsigned SubregHashTableSize = NextPowerOf2(2 * Regs.size());
+  unsigned* SubregHashTable =
+                  (unsigned*)malloc(2 * SubregHashTableSize * sizeof(unsigned));
+  for (unsigned i = 0; i < SubregHashTableSize * 2; ++i)
+    SubregHashTable[i] = ~0U;
+  
+  std::map<Record*, unsigned> RegNo;
+  for (unsigned i = 0, e = Regs.size(); i != e; ++i)
+    RegNo[Regs[i].TheDef] = i;
+  
+  for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
+    Record* R = Regs[i].TheDef;
+    for (std::set<Record*>::iterator I = RegisterSubRegs[R].begin(),
+         E = RegisterSubRegs[R].end(); I != E; ++I) {
+      Record* RJ = *I;
+      // We have to increase the indices of both registers by one when
+      // computing the hash because, in the generated code, there
+      // will be an extra empty slot at register 0.
+      size_t index = ((i+1) + (RegNo[RJ]+1) * 37) % SubregHashTableSize;
+      unsigned ProbeAmt = 2;
+      while (SubregHashTable[index*2] != ~0U &&
+             SubregHashTable[index*2+1] != ~0U) {
+        index = (index + ProbeAmt) % SubregHashTableSize;
+        ProbeAmt += 2;
+      }
+      
+      SubregHashTable[index*2] = i;
+      SubregHashTable[index*2+1] = RegNo[RJ];
+    }
+  }
+  
+  if (SubregHashTableSize) {
+    std::string Namespace = Regs[0].TheDef->getValueAsString("Namespace");
+    
+    OS << "\n\n  unsigned SubregHashTable[] = {";
+    for (unsigned i = 0; i < SubregHashTableSize - 1; ++i) {
+      if (SubregHashTable[2*i] != ~0U) {
+        OS << getQualifiedName(Regs[SubregHashTable[2*i]].TheDef) << ", "
+           << getQualifiedName(Regs[SubregHashTable[2*i+1]].TheDef) << ", ";
+      } else {
+        OS << Namespace << "::NoRegister, " << Namespace << "::NoRegister, ";
+      }
+    }
+    
+    unsigned Idx = SubregHashTableSize*2-2;
+    if (SubregHashTable[Idx] != ~0U) {
+      OS << getQualifiedName(Regs[SubregHashTable[Idx]].TheDef) << ", "
+         << getQualifiedName(Regs[SubregHashTable[Idx+1]].TheDef) << "};\n";
+    } else {
+      OS << Namespace << "::NoRegister, " << Namespace << "::NoRegister};\n";
+    }
+    
+    OS << "  unsigned SubregHashTableSize = "
+       << SubregHashTableSize << ";\n";
+  } else {
+    OS << "\n\n  unsigned SubregHashTable[] = { ~0U, ~0U };\n"
+       << "  unsigned SubregHashTableSize = 1;\n";
+  }
+  
+  free(SubregHashTable);
 
   if (!RegisterAliases.empty())
     OS << "\n\n  // Register Alias Sets...\n";
@@ -607,7 +671,10 @@
      << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
      << "  : TargetRegisterInfo(RegisterDescriptors, " << Registers.size()+1
      << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
-     << "                 CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
+     << "                 CallFrameSetupOpcode, CallFrameDestroyOpcode) {\n"
+     << "  this->SubregHash = SubregHashTable;\n"
+     << "  this->SubregHashSize = SubregHashTableSize;\n"
+     << "}\n\n";
 
   // Collect all information about dwarf register numbers