[llvm-commits] [llvm] r52892 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h utils/TableGen/RegisterInfoEmitter.cpp

[Evan Cheng]

Author: evancheng
Date: Mon Jun 30 02:32:56 2008
New Revision: 52892

URL: http://llvm.org/viewvc/llvm-project?rev=52892&view=rev
Log:
Eliminate TargetRegisterDesc::ImmSubRegs. It's no longer in use.

Modified:
    llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
    llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp

Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=52892&r1=52891&r2=52892&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Mon Jun 30 02:32:56 2008
@@ -42,18 +42,15 @@
 /// Registers that this does not apply to simply should set this to null.
 /// The SubRegs field is a zero terminated array of registers that are
 /// sub-registers of the specific register, e.g. AL, AH are sub-registers of AX.
-/// The ImmsubRegs field is a subset of SubRegs. It includes only the immediate
-/// sub-registers. e.g. EAX has only one immediate sub-register of AX, not AH,
-/// AL which are immediate sub-registers of AX. The SuperRegs field is a zero
-/// terminated array of registers that are super-registers of the specific
-/// register, e.g. RAX, EAX, are super-registers of AX.
+/// The SuperRegs field is a zero terminated array of registers that are
+/// super-registers of the specific register, e.g. RAX, EAX, are super-registers
+/// of AX.
 ///
 struct TargetRegisterDesc {
   const char     *AsmName;      // Assembly language name for the register
   const char     *Name;         // Printable name for the reg (for debugging)
   const unsigned *AliasSet;     // Register Alias Set, described above
   const unsigned *SubRegs;      // Sub-register set, described above
-  const unsigned *ImmSubRegs;   // Immediate sub-register set, described above
   const unsigned *SuperRegs;    // Super-register set, described above
 };
 
@@ -364,14 +361,6 @@
     return get(RegNo).SubRegs;
   }
 
-  /// getImmediateSubRegisters - Return the set of registers that are immediate
-  /// sub-registers of the specified register, or a null list of there are none.
-  /// The list returned is zero terminated.
-  ///
-  const unsigned *getImmediateSubRegisters(unsigned RegNo) const {
-    return get(RegNo).ImmSubRegs;
-  }
-
   /// getSuperRegisters - Return the list of registers that are super-registers
   /// of the specified register, or a null list of there are none. The list
   /// returned is zero terminated and sorted according to super-sub register

Modified: llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp?rev=52892&r1=52891&r2=52892&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/RegisterInfoEmitter.cpp Mon Jun 30 02:32:56 2008
@@ -418,7 +418,6 @@
   OS << "  };\n";
 
   // Emit register sub-registers / super-registers, aliases...
-  std::map<Record*, std::set<Record*> > RegisterImmSubRegs;
   std::map<Record*, std::set<Record*> > RegisterSubRegs;
   std::map<Record*, std::set<Record*> > RegisterSuperRegs;
   std::map<Record*, std::set<Record*> > RegisterAliases;
@@ -459,7 +458,6 @@
         cerr << "Warning: register " << getQualifiedName(SubReg)
              << " specified as a sub-register of " << getQualifiedName(R)
              << " multiple times!\n";
-      RegisterImmSubRegs[R].insert(SubReg);
       addSubSuperReg(R, SubReg, RegisterSubRegs, RegisterSuperRegs,
                      RegisterAliases);
     }
@@ -502,21 +500,6 @@
     OS << "0 };\n";
   }
 
-  if (!RegisterImmSubRegs.empty())
-    OS << "\n\n  // Register Immediate Sub-registers Sets...\n";
-
-  // Loop over all of the registers which have sub-registers, emitting the
-  // sub-registers list to memory.
-  for (std::map<Record*, std::set<Record*> >::iterator
-         I = RegisterImmSubRegs.begin(), E = RegisterImmSubRegs.end();
-       I != E; ++I) {
-    OS << "  const unsigned " << I->first->getName() << "_ImmSubRegsSet[] = { ";
-    for (std::set<Record*>::iterator ASI = I->second.begin(),
-           E = I->second.end(); ASI != E; ++ASI)
-      OS << getQualifiedName(*ASI) << ", ";
-    OS << "0 };\n";
-  }
-
   if (!RegisterSuperRegs.empty())
     OS << "\n\n  // Register Super-registers Sets...\n";
 
@@ -540,7 +523,7 @@
   }
 
   OS<<"\n  const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
-  OS << "    { \"NOREG\",\t\"NOREG\",\t0,\t0,\t0,\t0 },\n";
+  OS << "    { \"NOREG\",\t\"NOREG\",\t0,\t0,\t0 },\n";
 
   // Now that register alias and sub-registers sets have been emitted, emit the
   // register descriptors now.
@@ -571,10 +554,6 @@
       OS << Reg.getName() << "_SubRegsSet,\t";
     else
       OS << "Empty_SubRegsSet,\t";
-    if (RegisterImmSubRegs.count(Reg.TheDef))
-      OS << Reg.getName() << "_ImmSubRegsSet,\t";
-    else
-      OS << "Empty_SubRegsSet,\t";
     if (RegisterSuperRegs.count(Reg.TheDef))
       OS << Reg.getName() << "_SuperRegsSet },\n";
     else