[llvm-commits] [llvm] r52486 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2008-06-18-BadShuffle.ll
Eli Friedman
eli.friedman at gmail.com
Wed Jun 18 23:09:51 PDT 2008
Author: efriedma
Date: Thu Jun 19 01:09:51 2008
New Revision: 52486
URL: http://llvm.org/viewvc/llvm-project?rev=52486&view=rev
Log:
Fix a bug with <8 x i16> shuffle lowering on X86 where parts of the
shuffle could be skipped. The check is invalid because the loop index i
doesn't correspond to the element actually inserted. The correct check is
already done a few lines earlier, for whether the element is already in
the right spot, so this shouldn't have any effect on the codegen for
code that was already correct.
Added:
llvm/trunk/test/CodeGen/X86/2008-06-18-BadShuffle.ll
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=52486&r1=52485&r2=52486&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jun 19 01:09:51 2008
@@ -3445,8 +3445,6 @@
continue;
SDOperand Elt = MaskElts[i];
unsigned EltIdx = cast<ConstantSDNode>(Elt)->getValue();
- if (EltIdx == i)
- continue;
SDOperand ExtOp = (EltIdx < 8)
? DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i16, V1,
DAG.getConstant(EltIdx, PtrVT))
Added: llvm/trunk/test/CodeGen/X86/2008-06-18-BadShuffle.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-06-18-BadShuffle.ll?rev=52486&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-06-18-BadShuffle.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-06-18-BadShuffle.ll Thu Jun 19 01:09:51 2008
@@ -0,0 +1,10 @@
+; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 -mattr=+sse2 | grep pinsrw
+
+; Test to make sure we actually insert the bottom element of the vector
+define <8 x i16> @a(<8 x i16> %a) nounwind {
+entry:
+ shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> < i32 0, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8 >
+ %add = add <8 x i16> %0, %a
+ ret <8 x i16> %add
+}
+
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