[llvm-commits] [llvm] r52373 - in /llvm/trunk: lib/CodeGen/LowerSubregs.cpp test/CodeGen/X86/2008-06-16-SubregsBug.ll

[Evan Cheng]

Author: evancheng
Date: Mon Jun 16 17:52:53 2008
New Revision: 52373

URL: http://llvm.org/viewvc/llvm-project?rev=52373&view=rev
Log:
Do not issue identity copies.

Added:
    llvm/trunk/test/CodeGen/X86/2008-06-16-SubregsBug.ll
Modified:
    llvm/trunk/lib/CodeGen/LowerSubregs.cpp

Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=52373&r1=52372&r2=52373&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original)
+++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Mon Jun 16 17:52:53 2008
@@ -108,15 +108,20 @@
 
   DOUT << "subreg: CONVERTING: " << *MI;
 
-  // Insert sub-register copy
-  const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg);
-  const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg);
-  TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+  if (DstSubReg == InsReg) {
+    // No need to insert an identify copy instruction.
+    DOUT << "subreg: eliminated!";
+  } else {
+    // Insert sub-register copy
+    const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
+    const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
+    TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
 
 #ifndef NDEBUG
-  MachineBasicBlock::iterator dMI = MI;
-  DOUT << "subreg: " << *(--dMI);
+    MachineBasicBlock::iterator dMI = MI;
+    DOUT << "subreg: " << *(--dMI);
 #endif
+  }
 
   DOUT << "\n";
   MBB->remove(MI);
@@ -149,15 +154,19 @@
 
   DOUT << "subreg: CONVERTING: " << *MI;
 
-  // Insert sub-register copy
-  const TargetRegisterClass *TRC0 = TRI.getPhysicalRegisterRegClass(DstSubReg);
-  const TargetRegisterClass *TRC1 = TRI.getPhysicalRegisterRegClass(InsReg);
-  TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
-
+  if (DstSubReg == InsReg) {
+    // No need to insert an identify copy instruction.
+    DOUT << "subreg: eliminated!";
+  } else {
+    // Insert sub-register copy
+    const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
+    const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
+    TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
 #ifndef NDEBUG
-  MachineBasicBlock::iterator dMI = MI;
-  DOUT << "subreg: " << *(--dMI);
+    MachineBasicBlock::iterator dMI = MI;
+    DOUT << "subreg: " << *(--dMI);
 #endif
+  }
 
   DOUT << "\n";
   MBB->remove(MI);

Added: llvm/trunk/test/CodeGen/X86/2008-06-16-SubregsBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-06-16-SubregsBug.ll?rev=52373&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-06-16-SubregsBug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-06-16-SubregsBug.ll Mon Jun 16 17:52:53 2008
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin | grep mov | count 4
+
+define i16 @test(i16* %tmp179) nounwind  {
+	%tmp180 = load i16* %tmp179, align 2		; <i16> [#uses=2]
+	%tmp184 = and i16 %tmp180, -1024		; <i16> [#uses=1]
+	%tmp186 = icmp eq i16 %tmp184, -32768		; <i1> [#uses=1]
+	br i1 %tmp186, label %bb189, label %bb288
+
+bb189:		; preds = %0
+	ret i16 %tmp180
+
+bb288:		; preds = %0
+	ret i16 32
+}