[llvm-commits] [llvm] r52003 - /llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Zhou Sheng
zhousheng00 at gmail.com
Thu Jun 5 07:23:44 PDT 2008
Author: sheng
Date: Thu Jun 5 09:23:44 2008
New Revision: 52003
URL: http://llvm.org/viewvc/llvm-project?rev=52003&view=rev
Log:
If BitWidth equals to ShtAmt, the RHSKnownZero[BitWidth-ShiftAmt-1] will
crash the opt. Just fix this.
Test case in llvm/test/Transforms/InstCombine/2008-06-05-ashr-crash.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp?rev=52003&r1=52002&r2=52003&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/InstructionCombining.cpp Thu Jun 5 09:23:44 2008
@@ -1236,7 +1236,7 @@
// If the input sign bit is known to be zero, or if none of the top bits
// are demanded, turn this into an unsigned shift right.
- if (RHSKnownZero[BitWidth-ShiftAmt-1] ||
+ if (BitWidth == ShiftAmt || RHSKnownZero[BitWidth-ShiftAmt-1] ||
(HighBits & ~DemandedMask) == HighBits) {
// Perform the logical shift right.
Value *NewVal = BinaryOperator::CreateLShr(
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