[llvm-commits] [llvm-gcc-4.2] r51894 - in /llvm-gcc-4.2/trunk/gcc: Makefile.in config/mips/mips.c

[Bruno Cardoso Lopes]

Author: bruno
Date: Mon Jun  2 20:33:26 2008
New Revision: 51894

URL: http://llvm.org/viewvc/llvm-project?rev=51894&view=rev
Log:
Added mips and mipsel support and fixed undefined references in mips.c

Modified:
    llvm-gcc-4.2/trunk/gcc/Makefile.in
    llvm-gcc-4.2/trunk/gcc/config/mips/mips.c

Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/Makefile.in?rev=51894&r1=51893&r2=51894&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/Makefile.in (original)
+++ llvm-gcc-4.2/trunk/gcc/Makefile.in Mon Jun  2 20:33:26 2008
@@ -1140,6 +1140,8 @@
     ia64-*-*) echo ia64;; \
     i[34567]86-*-*) echo x86;; \
     x86_64-*-*) echo x86;; \
+    mips-*-*) echo mips;; \
+    mipsel-*-*) echo mipsel;; \
     powerpc*-*-*) echo powerpc;; \
     sparc-*-*) echo sparc;; \
     sparcv9-*-*) echo sparc;; \

Modified: llvm-gcc-4.2/trunk/gcc/config/mips/mips.c
URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/mips/mips.c?rev=51894&r1=51893&r2=51894&view=diff

==============================================================================
--- llvm-gcc-4.2/trunk/gcc/config/mips/mips.c (original)
+++ llvm-gcc-4.2/trunk/gcc/config/mips/mips.c Mon Jun  2 20:33:26 2008
@@ -7219,7 +7219,9 @@
   split_all_insns_noflow ();
   if (TARGET_MIPS16)
     mips16_lay_out_constants ();
+#ifndef ENABLE_LLVM
   shorten_branches (insn);
+#endif
   final_start_function (insn, file, 1);
   final (insn, file, 1);
   final_end_function ();
@@ -9022,7 +9024,9 @@
 
   /* Recalculate instruction lengths without taking nops into account.  */
   cfun->machine->ignore_hazard_length_p = true;
+#ifndef ENABLE_LLVM
   shorten_branches (get_insns ());
+#endif
 
   cfun->machine->all_noreorder_p = true;
 
@@ -9344,15 +9348,16 @@
 	 delay slot if is not annulled.  */
       if (!INSN_ANNULLED_BRANCH_P (insn))
 	{
+#ifndef ENABLE_LLVM
 	  final_scan_insn (XVECEXP (final_sequence, 0, 1),
 			   asm_out_file, optimize, 1, NULL);
+#endif
 	  INSN_DELETED_P (XVECEXP (final_sequence, 0, 1)) = 1;
 	}
       else
 	output_asm_insn ("nop", 0);
       fprintf (asm_out_file, "\n");
     }
-
   /* Output the unconditional branch to TAKEN.  */
   if (length <= 16)
     output_asm_insn ("j\t%0%/", &taken);
@@ -9369,8 +9374,10 @@
 	 Use INSN's delay slot if is annulled.  */
       if (INSN_ANNULLED_BRANCH_P (insn))
 	{
+#ifndef ENABLE_LLVM
 	  final_scan_insn (XVECEXP (final_sequence, 0, 1),
 			   asm_out_file, optimize, 1, NULL);
+#endif
 	  INSN_DELETED_P (XVECEXP (final_sequence, 0, 1)) = 1;
 	}
       else
@@ -9808,12 +9815,14 @@
 
      If INSN1 is the last instruction blocking X, it would better to
      choose (INSN1, X) over (INSN2, INSN1).  */
+#ifndef ENABLE_LLVM
   for (dep = INSN_DEPEND (insn1); dep != 0; dep = XEXP (dep, 1))
     if (REG_NOTE_KIND (dep) == REG_DEP_ANTI
 	&& INSN_PRIORITY (XEXP (dep, 0)) > INSN_PRIORITY (insn2)
 	&& recog_memoized (XEXP (dep, 0)) >= 0
 	&& get_attr_vr4130_class (XEXP (dep, 0)) == VR4130_CLASS_ALU)
       return false;
+#endif
 
   if (vr4130_last_insn != 0
       && recog_memoized (insn1) >= 0