[llvm-commits] [llvm] r50997 - /llvm/trunk/lib/Target/X86/X86InstrInfo.td
Dan Gohman
gohman at apple.com
Mon May 12 13:22:46 PDT 2008
Author: djg
Date: Mon May 12 15:22:45 2008
New Revision: 50997
URL: http://llvm.org/viewvc/llvm-project?rev=50997&view=rev
Log:
Fix a copy+paste bug; pseudo-instructions shouldn't have
encoding information.
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.td
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=50997&r1=50996&r2=50997&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Mon May 12 15:22:45 2008
@@ -2601,58 +2601,51 @@
// Atomic exchange and and, or, xor
let Constraints = "$val = $dst", Defs = [EFLAGS],
usesCustomDAGSchedInserter = 1 in {
-def ATOMAND32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+def ATOMAND32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
"#ATOMAND32 PSUEDO!",
- [(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>,
- TB, LOCK;
+ [(set GR32:$dst, (atomic_load_and addr:$ptr, GR32:$val))]>;
}
let Constraints = "$val = $dst", Defs = [EFLAGS],
usesCustomDAGSchedInserter = 1 in {
-def ATOMOR32 : I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+def ATOMOR32 : I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
"#ATOMOR32 PSUEDO!",
- [(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>,
- TB, LOCK;
+ [(set GR32:$dst, (atomic_load_or addr:$ptr, GR32:$val))]>;
}
let Constraints = "$val = $dst", Defs = [EFLAGS],
usesCustomDAGSchedInserter = 1 in {
-def ATOMXOR32 : I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+def ATOMXOR32 : I<0, Pseudo,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
"#ATOMXOR32 PSUEDO!",
- [(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>,
- TB, LOCK;
+ [(set GR32:$dst, (atomic_load_xor addr:$ptr, GR32:$val))]>;
}
let Constraints = "$val = $dst", Defs = [EFLAGS],
usesCustomDAGSchedInserter = 1 in {
-def ATOMMIN32: I<0xC1, MRMSrcMem, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val),
+def ATOMMIN32: I<0, Pseudo, (outs GR32:$dst), (ins i32mem:$ptr, GR32:$val),
"#ATOMMIN32 PSUEDO!",
- [(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>,
- TB, LOCK;
+ [(set GR32:$dst, (atomic_load_min addr:$ptr, GR32:$val))]>;
}
let Constraints = "$val = $dst", Defs = [EFLAGS],
usesCustomDAGSchedInserter = 1 in {
-def ATOMMAX32: I<0xC1, MRMSrcMem, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+def ATOMMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
"#ATOMMAX32 PSUEDO!",
- [(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>,
- TB, LOCK;
+ [(set GR32:$dst, (atomic_load_max addr:$ptr, GR32:$val))]>;
}
let Constraints = "$val = $dst", Defs = [EFLAGS],
usesCustomDAGSchedInserter = 1 in {
-def ATOMUMIN32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+def ATOMUMIN32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
"#ATOMUMIN32 PSUEDO!",
- [(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>,
- TB, LOCK;
+ [(set GR32:$dst, (atomic_load_umin addr:$ptr, GR32:$val))]>;
}
let Constraints = "$val = $dst", Defs = [EFLAGS],
usesCustomDAGSchedInserter = 1 in {
-def ATOMUMAX32: I<0xC1, MRMSrcMem,(outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
+def ATOMUMAX32: I<0, Pseudo, (outs GR32:$dst),(ins i32mem:$ptr, GR32:$val),
"#ATOMUMAX32 PSUEDO!",
- [(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>,
- TB, LOCK;
+ [(set GR32:$dst, (atomic_load_umax addr:$ptr, GR32:$val))]>;
}
//===----------------------------------------------------------------------===//
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