[llvm-commits] [llvm] r50303 - /llvm/trunk/test/CodeGen/X86/vec_insert_4.ll

[Chris Lattner]

Please add -mcpu=<something> so that this will pass on my G5, which  
doesn't have SSE. ;)

-Chris


On Apr 25, 2008, at 2:26 PM, Nate Begeman wrote:

> Author: sampo
> Date: Fri Apr 25 16:26:59 2008
> New Revision: 50303
>
> URL: http://llvm.org/viewvc/llvm-project?rev=50303&view=rev
> Log:
> Add a testcase for the recent "handle variable vector insert elt in  
> mem" patch
>
> Added:
>    llvm/trunk/test/CodeGen/X86/vec_insert_4.ll
>
> Added: llvm/trunk/test/CodeGen/X86/vec_insert_4.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert_4.ll?rev=50303&view=auto
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/test/CodeGen/X86/vec_insert_4.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/vec_insert_4.ll Fri Apr 25 16:26:59  
> 2008
> @@ -0,0 +1,11 @@
> +; RUN: llvm-as < %s | llc -march=x86 | grep 1084227584 | count 1
> +
> +; ModuleID = '<stdin>'
> +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32- 
> i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64- 
> f80:128:128"
> +target triple = "i686-apple-darwin9.2.2"
> +
> +define <8 x float> @f(<8 x float> %a, i32 %b) nounwind  {
> +entry:
> +	%vecins = insertelement <8 x float> %a, float 5.000000e+00, i32  
> %b		; <<4 x float>> [#uses=1]
> +	ret <8 x float> %vecins
> +}
>
>
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