[llvm-commits] [llvm] r49463 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/vec_shuffle-17.ll

[Chris Lattner]

Author: lattner
Date: Thu Apr 10 00:13:43 2008
New Revision: 49463

URL: http://llvm.org/viewvc/llvm-project?rev=49463&view=rev
Log:
Fix the x86-64 side of PR2108 by adding a v2f64 version of
MOVZQI2PQIrr.  This would be better handled as a dag combine 
(with the goal of eliminating the bitconvert) but I don't know
how to do that safely.  Thoughts welcome.

Added:
    llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=49463&r1=49462&r2=49463&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Apr 10 00:13:43 2008
@@ -2305,6 +2305,16 @@
                                  MOVL_shuffle_mask)))]>;
 }
 
+// Handle the v2f64 form of 'MOVZQI2PQIrr' for PR2108.  FIXME: this would be
+// better written as a dag combine xform.
+let AddedComplexity = 15 in
+def : Pat<(v2f64 (vector_shuffle immAllZerosV_bc,
+                                  (v2f64 (scalar_to_vector 
+                                       (f64 (bitconvert GR64:$src)))),
+                                  MOVL_shuffle_mask)),
+          (MOVZQI2PQIrr GR64:$src)>, Requires<[HasSSE3]>;
+          
+
 let AddedComplexity = 20 in {
 def MOVZDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src),
                        "movd\t{$src, $dst|$dst, $src}",

Added: llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll?rev=49463&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-17.ll Thu Apr 10 00:13:43 2008
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=x86-64 | grep {movd.*%rdi, %xmm0}
+; RUN: llvm-as < %s | llc -march=x86-64 | not grep xor
+; PR2108
+
+define <2 x i64> @doload64(i64 %x) nounwind  {
+entry:
+	%tmp717 = bitcast i64 %x to double		; <double> [#uses=1]
+	%tmp8 = insertelement <2 x double> undef, double %tmp717, i32 0		; <<2 x double>> [#uses=1]
+	%tmp9 = insertelement <2 x double> %tmp8, double 0.000000e+00, i32 1		; <<2 x double>> [#uses=1]
+	%tmp11 = bitcast <2 x double> %tmp9 to <2 x i64>		; <<2 x i64>> [#uses=1]
+	ret <2 x i64> %tmp11
+}
+