[llvm-commits] PATCH: Tailcallopt x86 byval argument handling
Arnold Schwaighofer
arnold.schwaighofer at gmail.com
Tue Apr 8 15:28:16 PDT 2008
Maybe i should add that byval lowering generates code similar to
following make the statements below clearer.
leaq 32(%rsp), %rsi #source of copy
movq 6, %rcx #number of bytes
movq %rsp, %rdi #destination of copy
rep;movsl
> I am not sure i understand. The impacted Registers RSI,RDI,RCX (or
> their 32bit respectives) always stays the same. They have nothing to do
> with the calling convention. A change in callling convention - which
> registers are used for passing does not influence above set (in the
> sence that above set is conservative, knowing the calling convention
> some of the above registers could be removed). It is caused by the
> fact that there has to be a byval lowering between moving actual
> parameters to registers and the tail call. the byval lowering creates
> new values in the RSI,RDI,RCX (ESI,EDI,ECX) registers invalidating the
> ones from the argument lowering - so arguments targeting those
> registers have to be temporarily stored to virtual registers before
> the byval lowering to be restored to the actual target registers
> aftwards.
More information about the llvm-commits
mailing list