[llvm-commits] [llvm] r49157 - /llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
Evan Cheng
evan.cheng at apple.com
Thu Apr 3 01:53:19 PDT 2008
Author: evancheng
Date: Thu Apr 3 03:53:17 2008
New Revision: 49157
URL: http://llvm.org/viewvc/llvm-project?rev=49157&view=rev
Log:
Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.
Modified:
llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=49157&r1=49156&r2=49157&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Thu Apr 3 03:53:17 2008
@@ -558,16 +558,10 @@
bool Need0FPrefix = false;
switch (Desc->TSFlags & X86II::Op0Mask) {
- case X86II::TB:
- Need0FPrefix = true; // Two-byte opcode prefix
- break;
- case X86II::T8:
- MCE.emitByte(0x0F);
- MCE.emitByte(0x38);
- break;
- case X86II::TA:
- MCE.emitByte(0x0F);
- MCE.emitByte(0x3A);
+ case X86II::TB: // Two-byte opcode prefix
+ case X86II::T8: // 0F 38
+ case X86II::TA: // 0F 3A
+ Need0FPrefix = true;
break;
case X86II::REP: break; // already handled.
case X86II::XS: // F3 0F
@@ -599,6 +593,15 @@
if (Need0FPrefix)
MCE.emitByte(0x0F);
+ switch (Desc->TSFlags & X86II::Op0Mask) {
+ case X86II::T8: // 0F 38
+ MCE.emitByte(0x38);
+ break;
+ case X86II::TA: // 0F 3A
+ MCE.emitByte(0x3A);
+ break;
+ }
+
// If this is a two-address instruction, skip one of the register operands.
unsigned NumOps = Desc->getNumOperands();
unsigned CurOp = 0;
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