[llvm-commits] [llvm] r49012 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/Target/ARM/ARMISelLowering.cpp test/CodeGen/ARM/fpconv.ll
Evan Cheng
evan.cheng at apple.com
Mon Mar 31 18:50:16 PDT 2008
Author: evancheng
Date: Mon Mar 31 20:50:16 2008
New Revision: 49012
URL: http://llvm.org/viewvc/llvm-project?rev=49012&view=rev
Log:
Unbreak ARM / Thumb soft FP support.
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/test/CodeGen/ARM/fpconv.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=49012&r1=49011&r2=49012&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Mon Mar 31 20:50:16 2008
@@ -5450,7 +5450,14 @@
}
RTLIB::Libcall LC;
- if (SourceVT == MVT::i64) {
+ if (SourceVT == MVT::i32) {
+ if (DestTy == MVT::f32)
+ LC = isSigned ? RTLIB::SINTTOFP_I64_F32 : RTLIB::UINTTOFP_I64_F32;
+ else {
+ assert(DestTy == MVT::f64 && "Unknown fp value type!");
+ LC = isSigned ? RTLIB::SINTTOFP_I32_F64 : RTLIB::UINTTOFP_I32_F64;
+ }
+ } else if (SourceVT == MVT::i64) {
if (DestTy == MVT::f32)
LC = RTLIB::SINTTOFP_I64_F32;
else if (DestTy == MVT::f64)
@@ -5481,7 +5488,7 @@
SDOperand HiPart;
SDOperand Result = ExpandLibCall(TLI.getLibcallName(LC), Source.Val, isSigned,
HiPart);
- if (Result.getValueType() != DestTy)
+ if (Result.getValueType() != DestTy && HiPart.Val)
Result = DAG.getNode(ISD::BUILD_PAIR, DestTy, Result, HiPart);
return Result;
}
@@ -6773,7 +6780,8 @@
Lo = ExpandIntToFP(Node->getOpcode() == ISD::SINT_TO_FP, VT,
Node->getOperand(0));
- ExpandOp(Lo, Lo, Hi);
+ if (getTypeAction(Lo.getValueType()) == Expand)
+ ExpandOp(Lo, Lo, Hi);
break;
}
}
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=49012&r1=49011&r2=49012&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Mon Mar 31 20:50:16 2008
@@ -248,16 +248,20 @@
setOperationAction(ISD::FCOS , MVT::f64, Expand);
setOperationAction(ISD::FREM , MVT::f64, Expand);
setOperationAction(ISD::FREM , MVT::f32, Expand);
- setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
- setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
+ if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) {
+ setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
+ setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
+ }
setOperationAction(ISD::FPOW , MVT::f64, Expand);
setOperationAction(ISD::FPOW , MVT::f32, Expand);
// int <-> fp are custom expanded into bit_convert + ARMISD ops.
- setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
- setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
- setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
- setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
+ if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb()) {
+ setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
+ setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
+ setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom);
+ setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom);
+ }
// We have target-specific dag combine patterns for the following nodes:
// ARMISD::FMRRD - No need to call setTargetDAGCombine
Modified: llvm/trunk/test/CodeGen/ARM/fpconv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpconv.ll?rev=49012&r1=49011&r2=49012&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fpconv.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fpconv.ll Mon Mar 31 20:50:16 2008
@@ -9,6 +9,16 @@
; RUN: grep fsitod %t
; RUN: grep fuitos %t
; RUN: grep fuitod %t
+; RUN: llvm-as < %s | llc -march=arm > %t
+; RUN: grep truncdfsf2 %t
+; RUN: grep extendsfdf2 %t
+; RUN: grep fixsfsi %t
+; RUN: grep fixunssfsi %t
+; RUN: grep fixdfsi %t
+; RUN: grep fixunsdfsi %t
+; RUN: grep floatdisf %t
+; RUN: grep floatsidf %t
+; RUN: llvm-as < %s | llc -march=thumb
define float @f1(double %x) {
entry:
More information about the llvm-commits
mailing list