[llvm-commits] [llvm] r48994 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/pr2182.ll
Dan Gohman
gohman at apple.com
Mon Mar 31 13:32:52 PDT 2008
Author: djg
Date: Mon Mar 31 15:32:52 2008
New Revision: 48994
URL: http://llvm.org/viewvc/llvm-project?rev=48994&view=rev
Log:
Fix a DAGCombiner optimization to respect volatile qualification.
Added:
llvm/trunk/test/CodeGen/X86/pr2182.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=48994&r1=48993&r2=48994&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Mar 31 15:32:52 2008
@@ -4387,7 +4387,8 @@
// value.
// TODO: Handle store large -> read small portion.
// TODO: Handle TRUNCSTORE/LOADEXT
- if (LD->getExtensionType() == ISD::NON_EXTLOAD) {
+ if (LD->getExtensionType() == ISD::NON_EXTLOAD &&
+ !LD->isVolatile()) {
if (ISD::isNON_TRUNCStore(Chain.Val)) {
StoreSDNode *PrevST = cast<StoreSDNode>(Chain);
if (PrevST->getBasePtr() == Ptr &&
Added: llvm/trunk/test/CodeGen/X86/pr2182.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2182.ll?rev=48994&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2182.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr2182.ll Mon Mar 31 15:32:52 2008
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc | grep {addl \$3, (%eax)} | count 4
+; PR2182
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+ at x = weak global i32 0 ; <i32*> [#uses=8]
+
+define void @loop_2() nounwind {
+entry:
+ %tmp = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1 = add i32 %tmp, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1, i32* @x, align 4
+ %tmp.1 = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1.1 = add i32 %tmp.1, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1.1, i32* @x, align 4
+ %tmp.2 = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1.2 = add i32 %tmp.2, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1.2, i32* @x, align 4
+ %tmp.3 = volatile load i32* @x, align 4 ; <i32> [#uses=1]
+ %tmp1.3 = add i32 %tmp.3, 3 ; <i32> [#uses=1]
+ volatile store i32 %tmp1.3, i32* @x, align 4
+ ret void
+}
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