[llvm-commits] [llvm] r48977 - /llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
Evan Cheng
evan.cheng at apple.com
Mon Mar 31 00:54:19 PDT 2008
Author: evancheng
Date: Mon Mar 31 02:54:19 2008
New Revision: 48977
URL: http://llvm.org/viewvc/llvm-project?rev=48977&view=rev
Log:
Re-apply 48911.
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=48977&r1=48976&r2=48977&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Mar 31 02:54:19 2008
@@ -748,6 +748,12 @@
}
return isPICBase;
}
+
+/// isGVStub - Return true if the GV requires an extra load to get the
+/// real address.
+static inline bool isGVStub(GlobalValue *GV, X86TargetMachine &TM) {
+ return TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(GV, TM, false);
+}
bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
switch (MI->getOpcode()) {
@@ -769,7 +775,9 @@
if (MI->getOperand(1).isReg() &&
MI->getOperand(2).isImm() &&
MI->getOperand(3).isReg() && MI->getOperand(3).getReg() == 0 &&
- MI->getOperand(4).isCPI()) {
+ (MI->getOperand(4).isCPI() ||
+ (MI->getOperand(4).isGlobal() &&
+ isGVStub(MI->getOperand(4).getGlobal(), TM)))) {
unsigned BaseReg = MI->getOperand(1).getReg();
if (BaseReg == 0)
return true;
@@ -831,13 +839,9 @@
// Loads from constant pools are trivially invariant.
if (MO.isCPI())
return true;
-
- if (MO.isGlobal()) {
- if (TM.getSubtarget<X86Subtarget>().GVRequiresExtraLoad(MO.getGlobal(),
- TM, false))
- return true;
- return false;
- }
+
+ if (MO.isGlobal())
+ return isGVStub(MO.getGlobal(), TM);
// If this is a load from an invariant stack slot, the load is a constant.
if (MO.isFI()) {
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