[llvm-commits] [llvm] r48833 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp lib/CodeGen/VirtRegMap.cpp test/CodeGen/X86/2007-03-26-CoalescerBug.ll

[Evan Cheng]

Author: evancheng
Date: Wed Mar 26 14:03:01 2008
New Revision: 48833

URL: http://llvm.org/viewvc/llvm-project?rev=48833&view=rev
Log:
Avoid commuting a def MI in order to coalesce a copy instruction away if any use of the same val# is a copy instruction that has already been coalesced.

Added:
    llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
Modified:
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
    llvm/trunk/lib/CodeGen/VirtRegMap.cpp

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=48833&r1=48832&r2=48833&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Mar 26 14:03:01 2008
@@ -283,6 +283,17 @@
   if (HasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
     return false;
 
+  // If some of the uses of IntA.reg is already coalesced away, return false.
+  // It's not possible to determine whether it's safe to perform the coalescing.
+  for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(IntA.reg),
+         UE = mri_->use_end(); UI != UE; ++UI) {
+    MachineInstr *UseMI = &*UI;
+    unsigned UseIdx = li_->getInstructionIndex(UseMI);
+    LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx);
+    if (ULR->valno == AValNo && JoinedCopies.count(UseMI))
+      return false;
+  }
+
   // At this point we have decided that it is legal to do this
   // transformation.  Start by commuting the instruction.
   MachineBasicBlock *MBB = DefMI->getParent();
@@ -323,8 +334,7 @@
     MachineInstr *UseMI = &*UI;
     ++UI;
     if (JoinedCopies.count(UseMI))
-      // It'll no longer be "joined" after the change.
-      JoinedCopies.erase(UseMI);
+      continue;
     unsigned UseIdx = li_->getInstructionIndex(UseMI);
     LiveInterval::iterator ULR = IntA.FindLiveRangeContaining(UseIdx);
     if (ULR->valno != AValNo)

Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=48833&r1=48832&r2=48833&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Wed Mar 26 14:03:01 2008
@@ -1593,6 +1593,7 @@
         }
       }
 
+      assert(PhysReg && "VR not assigned a physical register?");
       RegInfo->setPhysRegUsed(PhysReg);
       unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
       ReusedOperands.markClobbered(RReg);

Added: llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll?rev=48833&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2007-03-26-CoalescerBug.ll Wed Mar 26 14:03:01 2008
@@ -0,0 +1,49 @@
+; RUN: llvm-as < %s | llc -march=x86
+
+ at data = external global [339 x i64]
+
+define void @foo(...) {
+bb1:
+	%t43 = load i64* getelementptr ([339 x i64]* @data, i32 0, i64 212), align 4
+	br i1 false, label %bb80, label %bb6
+bb6:
+	br i1 false, label %bb38, label %bb265
+bb265:
+	ret void
+bb38:
+	br i1 false, label %bb80, label %bb49
+bb80:
+	br i1 false, label %bb146, label %bb268
+bb49:
+	ret void
+bb113:
+	ret void
+bb268:
+	%t1062 = shl i64 %t43, 3
+	%t1066 = shl i64 0, 3
+	br label %bb85
+bb85:
+	%t1025 = phi i64 [ 0, %bb268 ], [ %t102.0, %bb234 ]
+	%t1028 = phi i64 [ 0, %bb268 ], [ %t1066, %bb234 ]
+	%t1031 = phi i64 [ 0, %bb268 ], [ %t103.0, %bb234 ]
+	%t1034 = phi i64 [ 0, %bb268 ], [ %t1066, %bb234 ]
+	%t102.0 = add i64 %t1028, %t1025
+	%t103.0 = add i64 %t1034, %t1031
+	br label %bb86
+bb86:
+	%t108.0 = phi i64 [ %t102.0, %bb85 ], [ %t1139, %bb248 ]
+	%t110.0 = phi i64 [ %t103.0, %bb85 ], [ %t1142, %bb248 ]
+	br label %bb193
+bb193:
+	%t1081 = add i64 %t110.0, -8
+	%t1087 = add i64 %t108.0, -8
+	br i1 false, label %bb193, label %bb248
+bb248:
+	%t1139 = add i64 %t108.0, %t1062
+	%t1142 = add i64 %t110.0, %t1062
+	br i1 false, label %bb86, label %bb234
+bb234:
+	br i1 false, label %bb85, label %bb113
+bb146:
+	ret void
+}