[llvm-commits] [llvm] r48351 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Nate Begeman]

Author: sampo
Date: Thu Mar 13 19:53:31 2008
New Revision: 48351

URL: http://llvm.org/viewvc/llvm-project?rev=48351&view=rev
Log:
Tabs -> spaces
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=48351&r1=48350&r2=48351&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Mar 13 19:53:31 2008
@@ -3575,7 +3575,7 @@
         MVT::ValueType VT = Node->getValueType(0);
         Tmp2 = DAG.getConstantFP(0.0, VT);
         Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(Tmp1), Tmp1, Tmp2,
-			    ISD::SETUGT);
+                            ISD::SETUGT);
         Tmp3 = DAG.getNode(ISD::FNEG, VT, Tmp1);
         Result = DAG.getNode(ISD::SELECT, VT, Tmp2, Tmp1, Tmp3);
         break;
@@ -4164,11 +4164,11 @@
 
   case ISD::SETCC:
     assert(isTypeLegal(TLI.getSetCCResultType(Node->getOperand(0)))
-	   && "SetCC type is not legal??");
+           && "SetCC type is not legal??");
     Result = DAG.getNode(ISD::SETCC,
-			 TLI.getSetCCResultType(Node->getOperand(0)),
-	                 Node->getOperand(0), Node->getOperand(1),
-			 Node->getOperand(2));
+                         TLI.getSetCCResultType(Node->getOperand(0)),
+                         Node->getOperand(0), Node->getOperand(1),
+                         Node->getOperand(2));
     break;
     
   case ISD::TRUNCATE:
@@ -4791,7 +4791,7 @@
       CC = DAG.getCondCode(TLI.getCmpLibcallCC(LC1));
       if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
         Tmp1 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(Tmp1), Tmp1, Tmp2,
-			   CC);
+                           CC);
         LHS = ExpandLibCall(TLI.getLibcallName(LC2),
                             DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, 
                             false /*sign irrelevant*/, Dummy);
@@ -4879,14 +4879,14 @@
       // this identity: (B1 ? B2 : B3) --> (B1 & B2)|(!B1&B3)
       TargetLowering::DAGCombinerInfo DagCombineInfo(DAG, false, true, NULL);
       Tmp1 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo,
-			       LowCC, false, DagCombineInfo);
+                               LowCC, false, DagCombineInfo);
       if (!Tmp1.Val)
         Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, LowCC);
       Tmp2 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi,
                                CCCode, false, DagCombineInfo);
       if (!Tmp2.Val)
         Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(LHSHi), LHSHi,
-			   RHSHi,CC);
+                           RHSHi,CC);
       
       ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.Val);
       ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.Val);
@@ -4907,7 +4907,7 @@
                                    ISD::SETEQ, false, DagCombineInfo);
         if (!Result.Val)
           Result=DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi,
-			      ISD::SETEQ);
+                              ISD::SETEQ);
         Result = LegalizeOp(DAG.getNode(ISD::SELECT, Tmp1.getValueType(),
                                         Result, Tmp1, Tmp2));
         Tmp1 = Result;
@@ -6834,11 +6834,10 @@
     SDOperand ScalarOp = Node->getOperand(1);
     if (Index < NewNumElts_Lo)
       Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVT_Lo, Lo, ScalarOp,
-                       DAG.getConstant(Index, TLI.getPointerTy()));
+                       DAG.getIntPtrConstant(Index));
     else
       Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, NewVT_Hi, Hi, ScalarOp,
-                       DAG.getConstant(Index - NewNumElts_Lo,
-                                       TLI.getPointerTy()));
+                       DAG.getIntPtrConstant(Index - NewNumElts_Lo));
     break;
   }
   case ISD::VECTOR_SHUFFLE: {
@@ -6851,7 +6850,12 @@
     // buildvector of extractelement here because the input vectors will have
     // to be legalized, so this makes the code simpler.
     for (unsigned i = 0; i != NewNumElts_Lo; ++i) {
-      unsigned Idx = cast<ConstantSDNode>(Mask.getOperand(i))->getValue();
+      SDOperand IdxNode = Mask.getOperand(i);
+      if (IdxNode.getOpcode() == ISD::UNDEF) {
+        Ops.push_back(DAG.getNode(ISD::UNDEF, NewEltVT));
+        continue;
+      }
+      unsigned Idx = cast<ConstantSDNode>(IdxNode)->getValue();
       SDOperand InVec = Node->getOperand(0);
       if (Idx >= NumElements) {
         InVec = Node->getOperand(1);
@@ -6864,7 +6868,12 @@
     Ops.clear();
     
     for (unsigned i = NewNumElts_Lo; i != NumElements; ++i) {
-      unsigned Idx = cast<ConstantSDNode>(Mask.getOperand(i))->getValue();
+      SDOperand IdxNode = Mask.getOperand(i);
+      if (IdxNode.getOpcode() == ISD::UNDEF) {
+        Ops.push_back(DAG.getNode(ISD::UNDEF, NewEltVT));
+        continue;
+      }
+      unsigned Idx = cast<ConstantSDNode>(IdxNode)->getValue();
       SDOperand InVec = Node->getOperand(0);
       if (Idx >= NumElements) {
         InVec = Node->getOperand(1);