[llvm-commits] [llvm] r48142 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp

[Bill Wendling]

Author: void
Date: Mon Mar 10 03:13:01 2008
New Revision: 48142

URL: http://llvm.org/viewvc/llvm-project?rev=48142&view=rev
Log:
Minor cleanup. No functionality change.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=48142&r1=48141&r2=48142&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Mon Mar 10 03:13:01 2008
@@ -50,8 +50,7 @@
 
     virtual bool runOnMachineFunction(MachineFunction &MF);
 
-    /// FIXME: Loop preheaders?
-    ///
+    // FIXME: Loop preheaders?
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.setPreservesCFG();
       AU.addRequired<MachineLoopInfo>();
@@ -119,6 +118,9 @@
           if (ToMBB->getBasicBlock())
             DOUT << " to MachineBasicBlock "
                  << ToMBB->getBasicBlock()->getName();
+          if (FromMBB->getBasicBlock())
+            DOUT << " from MachineBasicBlock "
+                 << FromMBB->getBasicBlock()->getName();
           DOUT << "\n";
         });
 
@@ -241,8 +243,7 @@
       return false;
     }
   }
-  
-  
+
   DEBUG({
       DOUT << "--- Checking if we can hoist " << I;
       if (I.getDesc().getImplicitUses()) {
@@ -271,13 +272,14 @@
   for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = I.getOperand(i);
 
-    if (!(MO.isRegister() && MO.getReg() && MO.isUse()))
+    if (!MO.isRegister() || !MO.isUse())
       continue;
 
     unsigned Reg = MO.getReg();
+    if (Reg == 0) continue;
 
     // Don't hoist instructions that access physical registers.
-    if (!TargetRegisterInfo::isVirtualRegister(Reg))
+    if (TargetRegisterInfo::isPhysicalRegister(Reg))
       return false;
 
     assert(RegInfo->getVRegDef(Reg)&&"Machine instr not mapped for this vreg?");