[llvm-commits] [llvm] r47635 - in /llvm/trunk/lib/Target/X86: X86ISelLowering.cpp X86ISelLowering.h

[Arnold Schwaighofer]

Author: arnolds
Date: Tue Feb 26 16:21:54 2008
New Revision: 47635

URL: http://llvm.org/viewvc/llvm-project?rev=47635&view=rev
Log:
Refactor according to Evan's and Anton's suggestions.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.h

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=47635&r1=47634&r2=47635&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb 26 16:21:54 2008
@@ -1083,6 +1083,24 @@
   return false;
 }
 
+/// CallRequiresGOTInRegister - Check whether the call requires the GOT pointer
+/// in a register before calling.
+bool X86TargetLowering::CallRequiresGOTPtrInReg(bool Is64Bit, bool IsTailCall) {
+  return !IsTailCall && !Is64Bit &&
+    getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
+    Subtarget->isPICStyleGOT();
+}
+
+
+/// CallRequiresFnAddressInReg - Check whether the call requires the function
+/// address to be loaded in a register.
+bool 
+X86TargetLowering::CallRequiresFnAddressInReg(bool Is64Bit, bool IsTailCall) {
+  return !Is64Bit && IsTailCall &&  
+    getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
+    Subtarget->isPICStyleGOT();
+}
+
 /// CopyTailCallClobberedArgumentsToVRegs - Create virtual registers for all
 /// arguments to force loading and guarantee that arguments sourcing from
 /// incomming parameters are not overwriting each other.
@@ -1552,22 +1570,19 @@
 
   // ELF / PIC requires GOT in the EBX register before function calls via PLT
   // GOT pointer.  
+  if (CallRequiresGOTPtrInReg(Is64Bit, IsTailCall)) {
+    Chain = DAG.getCopyToReg(Chain, X86::EBX,
+                             DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()),
+                             InFlag);
+    InFlag = Chain.getValue(1);
+  }
   // If we are tail calling and generating PIC/GOT style code load the address
   // of the callee into ecx. The value in ecx is used as target of the tail
   // jump. This is done to circumvent the ebx/callee-saved problem for tail
   // calls on PIC/GOT architectures. Normally we would just put the address of
   // GOT into ebx and then call target at PLT. But for tail callss ebx would be
   // restored (since ebx is callee saved) before jumping to the target at PLT.
-  if (!IsTailCall && !Is64Bit &&
-      getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
-      Subtarget->isPICStyleGOT()) {
-    Chain = DAG.getCopyToReg(Chain, X86::EBX,
-                             DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()),
-                             InFlag);
-    InFlag = Chain.getValue(1);
-  } else if (!Is64Bit && IsTailCall &&  
-             getTargetMachine().getRelocationModel() == Reloc::PIC_ &&
-             Subtarget->isPICStyleGOT() ) {
+  if (CallRequiresFnAddressInReg(Is64Bit, IsTailCall)) {
     // Note: The actual moving to ecx is done further down.
     GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee);
     if (G &&  !G->getGlobal()->hasHiddenVisibility() &&

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=47635&r1=47634&r2=47635&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Feb 26 16:21:54 2008
@@ -491,6 +491,8 @@
 
     // Call lowering helpers.
     bool IsCalleePop(SDOperand Op);
+    bool CallRequiresGOTPtrInReg(bool Is64Bit, bool IsTailCall);
+    bool CallRequiresFnAddressInReg(bool Is64Bit, bool IsTailCall);
     CCAssignFn *CCAssignFnForNode(SDOperand Op) const;
     NameDecorationStyle NameDecorationForFORMAL_ARGUMENTS(SDOperand Op);
     unsigned GetAlignedArgumentStackSize(unsigned StackSize, SelectionDAG &DAG);