[llvm-commits] [llvm] r47521 - in /llvm/trunk: lib/Bitcode/Reader/BitcodeReader.cpp lib/Bitcode/Writer/BitcodeWriter.cpp test/Assembler/2008-02-20-MultipleReturnValue.ll

Evan Cheng evan.cheng at apple.com
Sat Feb 23 11:33:24 PST 2008


Hi Devang,

I am backing this out for now since it's breaking several tests.  
Please investigate.

New Test Failures:
Benchmarks/FreeBench/fourinarow/fourinarow [Bytecode, LLC compile, LLC- 
BETA compile, JIT codegen, CBE, LLC, LLC-BETA, JIT]
Benchmarks/MiBench/consumer-typeset/consumer-typeset [Bytecode, LLC  
compile, LLC-BETA compile, JIT codegen, CBE, LLC, LLC-BETA, JIT]
Benchmarks/MiBench/office-ispell/office-ispell [Bytecode, LLC compile,  
LLC-BETA compile, JIT codegen, CBE, LLC, LLC-BETA, JIT]
SPEC/CINT2000/176.gcc/176.gcc [Bytecode, LLC compile, LLC-BETA  
compile, JIT codegen, CBE, LLC, LLC-BETA, JIT]
SPEC/CINT2000/253.perlbmk/253.perlbmk [Bytecode, LLC compile, LLC-BETA  
compile, JIT codegen, CBE, LLC, LLC-BETA, JIT]
SPEC/CINT2006/400.perlbench/400.perlbench [Bytecode, LLC compile, LLC- 
BETA compile, JIT codegen, , LLC, LLC-BETA]
SPEC/CINT2006/403.gcc/403.gcc [Bytecode, LLC compile, LLC-BETA  
compile, JIT codegen, CBE, LLC, LLC-BETA, JIT]

Thanks,

Evan

On Feb 23, 2008, at 1:24 AM, Evan Cheng wrote:

> It failed earlier at llvm-ld:
>
> /Users/echeng/LLVM/llvm/Release/bin/llvm-ld -link-as-library -disable-
> opt Output/align.bc Output/misc.bc Output/sim4.init.bc Output/
> sim4b1.bc -o Output/SIBsim4.linked.rbc
> Assertion failed: (isa<X>(Val) && "cast<Ty>() argument of incompatible
> type!"), function cast, file /Users/echeng/LLVM/llvm/include/llvm/
> Support/Casting.h, line 199.
>
> Evan
>
> On Feb 23, 2008, at 1:14 AM, Evan Cheng wrote:
>
>> I am not sure if this is related. But I am seeing errors related to
>> bitcode read / write:
>>
>> /Users/echeng/LLVM/llvm/Release/bin/llc -relocation-model=pic -
>> disable-fp-elim -f Output/clamscan.llvm.bc -o Output/clamscan.llc.s
>> /Users/echeng/LLVM/llvm/Release/bin/llc: bitcode didn't read
>> correctly.
>> Reason: can't open file 'Output/clamscan.llvm.bc'No such file or
>> directory
>> make[4]: [Output/clamscan.llc.s] Error 1 (ignored)
>>
>> I am running with DISABLE_LTO=1 TARGET_LLCFLAGS="-relocation-
>> model=pic -disable-fp-elim"
>>
>> Evan
>>
>> On Feb 22, 2008, at 5:44 PM, Devang Patel wrote:
>>
>>> Author: dpatel
>>> Date: Fri Feb 22 19:44:55 2008
>>> New Revision: 47521
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=47521&view=rev
>>> Log:
>>> Properly read and write bitcodes for multiple return values.
>>>
>>> Modified:
>>>  llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
>>>  llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
>>>  llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll
>>>
>>> Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=47521&r1=47520&r2=47521&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original)
>>> +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Fri Feb 22
>>> 19:44:55 2008
>>> @@ -1337,17 +1337,30 @@
>>>   }
>>>
>>>   case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval<optional>]
>>> -      if (Record.empty()) {
>>> -        I = new ReturnInst();
>>> -        break;
>>> -      } else {
>>> -        unsigned OpNum = 0;
>>> -        Value *Op;
>>> -        if (getValueTypePair(Record, OpNum, NextValueNo, Op) ||
>>> -            OpNum != Record.size())
>>> -          return Error("Invalid RET record");
>>> -        I = new ReturnInst(Op);
>>> -        break;
>>> +      {
>>> +        unsigned Size = Record.size();
>>> +        if (Size == 0) {
>>> +          I = new ReturnInst();
>>> +          break;
>>> +        } else if (Size == 1) {
>>> +          unsigned OpNum = 0;
>>> +          Value *Op;
>>> +          if (getValueTypePair(Record, OpNum, NextValueNo, Op) ||
>>> +              OpNum != Record.size())
>>> +            return Error("Invalid RET record");
>>> +          I = new ReturnInst(Op);
>>> +          break;
>>> +        } else {
>>> +          std::vector<Value *> Vs;
>>> +          Value *Op;
>>> +          unsigned OpNum = 0;
>>> +          for (unsigned i = 0; i < Size; ++i) {
>>> +            getValueTypePair(Record, OpNum, NextValueNo, Op);
>>> +            Vs.push_back(Op);
>>> +          }
>>> +          I = new ReturnInst(Vs);
>>> +          break;
>>> +        }
>>>     }
>>>   case bitc::FUNC_CODE_INST_BR: { // BR: [bb#, bb#, opval] or [bb#]
>>>     if (Record.size() != 1 && Record.size() != 3)
>>>
>>> Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=47521&r1=47520&r2=47521&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)
>>> +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Fri Feb 22
>>> 19:44:55 2008
>>> @@ -747,15 +747,23 @@
>>> case Instruction::GetResult:
>>>   Code = bitc::FUNC_CODE_INST_GETRESULT;
>>>   PushValueAndType(I.getOperand(0), InstID, Vals, VE);
>>> -    Vals.push_back(Log2_32(cast<GetResultInst>(I).getIndex())+1);
>>> +    Vals.push_back(cast<GetResultInst>(I).getIndex());
>>>   break;
>>>
>>> -  case Instruction::Ret:
>>> -    Code = bitc::FUNC_CODE_INST_RET;
>>> -    if (!I.getNumOperands())
>>> -      AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV;
>>> -    else if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE))
>>> -      AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV;
>>> +  case Instruction::Ret:
>>> +    {
>>> +      Code = bitc::FUNC_CODE_INST_RET;
>>> +      unsigned NumOperands = I.getNumOperands();
>>> +      if (NumOperands == 0)
>>> +        AbbrevToUse = FUNCTION_INST_RET_VOID_ABBREV;
>>> +      else if (NumOperands == 1) {
>>> +        if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE))
>>> +          AbbrevToUse = FUNCTION_INST_RET_VAL_ABBREV;
>>> +      } else {
>>> +        for (unsigned i = 0, e = NumOperands; i != e; ++i)
>>> +          PushValueAndType(I.getOperand(i), InstID, Vals, VE);
>>> +      }
>>> +    }
>>>   break;
>>> case Instruction::Br:
>>>   Code = bitc::FUNC_CODE_INST_BR;
>>>
>>> Modified: llvm/trunk/test/Assembler/2008-02-20- 
>>> MultipleReturnValue.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll?rev=47521&r1=47520&r2=47521&view=diff
>>>
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> =
>>> = 
>>> ====================================================================
>>> --- llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll
>>> (original)
>>> +++ llvm/trunk/test/Assembler/2008-02-20-MultipleReturnValue.ll Fri
>>> Feb 22 19:44:55 2008
>>> @@ -1,4 +1,4 @@
>>> -; RUN: llvm-as < %s -disable-output
>>> +; RUN: llvm-as < %s | opt -verify | llvm-dis | llvm-as -disable-
>>> output
>>>
>>> define {i32, i8} @foo(i32 %p) {
>>> ret i32 1, i8 2
>>>
>>>
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>>
>
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