[llvm-commits] [llvm] r46828 - /llvm/branches/Apple/Zim/lib/CodeGen/RegAllocLocal.cpp

[Owen Anderson]

I should clarify that, in a general sense, RegAllocLocal does not  
depend on LiveVariables, but declaring it as such seems to be  
necessary to obtain a working pass ordering.

--Owen

On Feb 6, 2008, at 4:33 PM, Bill Wendling wrote:

> Author: void
> Date: Wed Feb  6 16:33:59 2008
> New Revision: 46828
>
> URL: http://llvm.org/viewvc/llvm-project?rev=46828&view=rev
> Log:
> [From mainline]
>
> http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080204/057964.html
>
>  RegAllocaLocal still *requires* LiveVariables since it runs  
> PHIElimination,
>  followed by TwoAddress which requires LiveVariables. We cannot run
>  LiveVariables on non-SSA code.
>
> http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20080204/057979.html
>
>  Fix a number of local register allocator issues: PR1609.
>
>
> Modified:
>    llvm/branches/Apple/Zim/lib/CodeGen/RegAllocLocal.cpp
>
> Modified: llvm/branches/Apple/Zim/lib/CodeGen/RegAllocLocal.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Zim/lib/CodeGen/RegAllocLocal.cpp?rev=46828&r1=46827&r2=46828&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/branches/Apple/Zim/lib/CodeGen/RegAllocLocal.cpp (original)
> +++ llvm/branches/Apple/Zim/lib/CodeGen/RegAllocLocal.cpp Wed Feb  6  
> 16:33:59 2008
> @@ -14,11 +14,12 @@
>
> #define DEBUG_TYPE "regalloc"
> #include "llvm/BasicBlock.h"
> -#include "llvm/CodeGen/Passes.h"
> +#include "llvm/CodeGen/LiveVariables.h"
> #include "llvm/CodeGen/MachineFunctionPass.h"
> #include "llvm/CodeGen/MachineInstr.h"
> #include "llvm/CodeGen/MachineFrameInfo.h"
> #include "llvm/CodeGen/MachineRegisterInfo.h"
> +#include "llvm/CodeGen/Passes.h"
> #include "llvm/CodeGen/RegAllocRegistry.h"
> #include "llvm/Target/TargetInstrInfo.h"
> #include "llvm/Target/TargetMachine.h"
> @@ -28,6 +29,7 @@
> #include "llvm/ADT/IndexedMap.h"
> #include "llvm/ADT/SmallVector.h"
> #include "llvm/ADT/Statistic.h"
> +#include "llvm/ADT/STLExtras.h"
> #include <algorithm>
> using namespace llvm;
>
> @@ -146,6 +148,7 @@
>     }
>
>     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
> +      AU.addRequired<LiveVariables>();
>       AU.addRequiredID(PHIEliminationID);
>       AU.addRequiredID(TwoAddressInstructionPassID);
>       MachineFunctionPass::getAnalysisUsage(AU);
> @@ -294,16 +297,24 @@
>     std::pair<MachineInstr*, unsigned> &LastUse =  
> getVirtRegLastUse(VirtReg);
>     if (LastUse.first)
>       LastUse.first->getOperand(LastUse.second).setIsKill();
> -  }
> -
> -  // Otherwise, there is a virtual register corresponding to this  
> physical
> -  // register.  We only need to spill it into its stack slot if it  
> has been
> -  // modified.
> -  if (isVirtRegModified(VirtReg)) {
> +  } else {
> +    // Otherwise, there is a virtual register corresponding to this  
> physical
> +    // register.  We only need to spill it into its stack slot if  
> it has been
> +    // modified.
>     const TargetRegisterClass *RC = MF- 
> >getRegInfo().getRegClass(VirtReg);
>     int FrameIndex = getStackSpaceFor(VirtReg, RC);
>     DOUT << " to stack slot #" << FrameIndex;
>     TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIndex, RC);
> +
> +    // If the instruction reads the register that's spilled, (e.g.  
> this can
> +    // happen if it is a move to a physical register), then the spill
> +    // instruction is not a kill.
> +    if (I != MBB.end() && I->findRegisterUseOperandIdx(PhysReg) !=  
> -1) {
> +      MachineBasicBlock::iterator StoreMI = prior(I);
> +      int Idx = StoreMI->findRegisterUseOperandIdx(PhysReg, true);
> +      assert(Idx != -1 && "Unrecognized spill instruction!");
> +      StoreMI->getOperand(Idx).setIsKill(false);
> +    }
>     ++NumStores;   // Update statistics
>   }
>
> @@ -492,12 +503,6 @@
>     // If we can fold this spill into this instruction, do so now.
>     SmallVector<unsigned, 2> Ops;
>     Ops.push_back(OpNum);
> -    if (MachineInstr* FMI = TII->foldMemoryOperand(MI, Ops,  
> FrameIndex)) {
> -      ++NumFolded;
> -      // Update kill/dead flags.
> -      FMI->copyKillDeadInfo(MI);
> -      return MBB.insert(MBB.erase(MI), FMI);
> -    }
>
>     // It looks like we can't fold this virtual register load into  
> this
>     // instruction.  Force some poor hapless value out of the  
> register file to
> @@ -773,9 +778,8 @@
>
>     // Finally, if this is a noop copy instruction, zap it.
>     unsigned SrcReg, DstReg;
> -    if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg) {
> +    if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
>       MBB.erase(MI);
> -    }
>   }
>
>   MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-------------- next part --------------
A non-text attachment was scrubbed...
Name: smime.p7s
Type: application/pkcs7-signature
Size: 2555 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20080206/03a0342e/attachment.bin>