[llvm-commits] [llvm] r46764 - in /llvm/trunk: include/llvm/CallingConv.h lib/Target/X86/X86CallingConv.td lib/Target/X86/X86ISelLowering.cpp

[Dale Johannesen]

Author: johannes
Date: Tue Feb  5 14:46:33 2008
New Revision: 46764

URL: http://llvm.org/viewvc/llvm-project?rev=46764&view=rev
Log:
Implement sseregparm.


Modified:
    llvm/trunk/include/llvm/CallingConv.h
    llvm/trunk/lib/Target/X86/X86CallingConv.td
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/include/llvm/CallingConv.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CallingConv.h?rev=46764&r1=46763&r2=46764&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CallingConv.h (original)
+++ llvm/trunk/include/llvm/CallingConv.h Tue Feb  5 14:46:33 2008
@@ -57,7 +57,11 @@
     /// X86_FastCall - 'fast' analog of X86_StdCall. Passes first two arguments
     /// in ECX:EDX registers, others - via stack. Callee is responsible for
     /// stack cleaning.
-    X86_FastCall = 65
+    X86_FastCall = 65,
+
+    /// X86_SSEreg - The standard convention except that float and double
+    /// values are returned in XMM0 if SSE support is available.
+    X86_SSECall = 66
   };
 } // End CallingConv namespace
 

Modified: llvm/trunk/lib/Target/X86/X86CallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CallingConv.td?rev=46764&r1=46763&r2=46764&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86CallingConv.td (original)
+++ llvm/trunk/lib/Target/X86/X86CallingConv.td Tue Feb  5 14:46:33 2008
@@ -61,6 +61,15 @@
   CCDelegateTo<RetCC_X86Common>
 ]>;
 
+// X86-32 SSEregparm return-value convention.
+def RetCC_X86_32_SSE : CallingConv<[
+  // The X86-32 sseregparm calling convention returns FP values in XMM0 if the
+  // target has SSE2, otherwise it is the C calling convention.
+  CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
+  CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0]>>>,
+  CCDelegateTo<RetCC_X86Common>
+]>;
+
 // X86-64 C return-value convention.
 def RetCC_X86_64_C : CallingConv<[
   // The X86-64 calling convention always returns FP values in XMM0.
@@ -69,12 +78,12 @@
   CCDelegateTo<RetCC_X86Common>
 ]>;
 
-
-
 // This is the root return-value convention for the X86-32 backend.
 def RetCC_X86_32 : CallingConv<[
   // If FastCC, use RetCC_X86_32_Fast.
   CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
+  // If SSECC, use RetCC_X86_32_SSE.
+  CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
   // Otherwise, use RetCC_X86_32_C.
   CCDelegateTo<RetCC_X86_32_C>
 ]>;
@@ -179,6 +188,11 @@
   // Handles byval parameters.
   CCIfByVal<CCPassByVal<4, 4>>,
 
+  // The first 3 float or double arguments, if marked 'inreg' and if the call
+  // is not a vararg call and if SSE2 is available, are passed in SSE registers.
+  CCIfNotVarArg<CCIfInReg<CCIfType<[f32,f64], CCIfSubtarget<"hasSSE2()",
+                CCAssignToReg<[XMM0,XMM1,XMM2]>>>>>,
+
   // Integer/Float values get stored in stack slots that are 4 bytes in
   // size and 4-byte aligned.
   CCIfType<[i32, f32], CCAssignToStack<4, 4>>,

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=46764&r1=46763&r2=46764&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Feb  5 14:46:33 2008
@@ -1137,9 +1137,9 @@
         RC = X86::GR32RegisterClass;
       else if (Is64Bit && RegVT == MVT::i64)
         RC = X86::GR64RegisterClass;
-      else if (Is64Bit && RegVT == MVT::f32)
+      else if (RegVT == MVT::f32)
         RC = X86::FR32RegisterClass;
-      else if (Is64Bit && RegVT == MVT::f64)
+      else if (RegVT == MVT::f64)
         RC = X86::FR64RegisterClass;
       else {
         assert(MVT::isVector(RegVT));