[llvm-commits] [llvm] r45647 - in /llvm/trunk/utils/TableGen: InstrInfoEmitter.cpp InstrInfoEmitter.h
Chris Lattner
sabre at nondot.org
Sat Jan 5 17:53:37 PST 2008
Author: lattner
Date: Sat Jan 5 19:53:37 2008
New Revision: 45647
URL: http://llvm.org/viewvc/llvm-project?rev=45647&view=rev
Log:
rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet.
Modified:
llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
llvm/trunk/utils/TableGen/InstrInfoEmitter.h
Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=45647&r1=45646&r2=45647&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Sat Jan 5 19:53:37 2008
@@ -138,6 +138,40 @@
}
//===----------------------------------------------------------------------===//
+// Instruction Analysis
+//===----------------------------------------------------------------------===//
+
+void InstrInfoEmitter::InferFromPattern(const CodeGenInstruction &Inst,
+ bool &isStore, bool &isLoad,
+ bool &NeverHasSideEffects) {
+ isStore = Inst.isStore;
+ isLoad = Inst.isLoad;
+ NeverHasSideEffects = Inst.neverHasSideEffects;
+
+ const TreePattern *Pattern = CDP.getInstruction(Inst.TheDef).getPattern();
+ if (Pattern == 0) return; // No pattern.
+
+ // FIXME: Change this to use pattern info.
+ if (dynamic_cast<ListInit*>(Inst.TheDef->getValueInit("Pattern"))) {
+ ListInit *LI = Inst.TheDef->getValueAsListInit("Pattern");
+ if (LI && LI->getSize() > 0) {
+ DagInit *Dag = (DagInit *)LI->getElement(0);
+ DefInit *OpDef = dynamic_cast<DefInit*>(Dag->getOperator());
+ if (OpDef) {
+ Record *Operator = OpDef->getDef();
+ if (Operator->isSubClassOf("SDNode")) {
+ const std::string Opcode = Operator->getValueAsString("Opcode");
+ if (Opcode == "ISD::STORE" || Opcode == "ISD::TRUNCSTORE")
+ isStore = true;
+ }
+ }
+ }
+ }
+
+}
+
+
+//===----------------------------------------------------------------------===//
// Main Output.
//===----------------------------------------------------------------------===//
@@ -196,43 +230,27 @@
std::map<std::vector<Record*>, unsigned> &EmittedLists,
const OperandInfoMapTy &OpInfo,
std::ostream &OS) {
- int MinOperands;
+ // Determine properties of the instruction from its pattern.
+ bool isStore, isLoad, NeverHasSideEffects;
+ InferFromPattern(Inst, isStore, isLoad, NeverHasSideEffects);
+
+ if (NeverHasSideEffects && Inst.mayHaveSideEffects) {
+ std::cerr << "error: Instruction '" << Inst.getName()
+ << "' is marked with 'mayHaveSideEffects', but it can never have them!\n";
+ exit(1);
+ }
+
+ int MinOperands = 0;
if (!Inst.OperandList.empty())
// Each logical operand can be multiple MI operands.
MinOperands = Inst.OperandList.back().MIOperandNo +
Inst.OperandList.back().MINumOperands;
- else
- MinOperands = 0;
OS << " { ";
OS << Num << ",\t" << MinOperands << ",\t"
- << Inst.NumDefs << ",\t\"";
-
- if (Inst.Name.empty())
- OS << Inst.TheDef->getName();
- else
- OS << Inst.Name;
-
+ << Inst.NumDefs << ",\t\"" << Inst.getName();
OS << "\",\t" << getItinClassNumber(Inst.TheDef) << ", 0";
- // Try to determine (from the pattern), if the instruction is a store.
- bool isStore = false;
- if (dynamic_cast<ListInit*>(Inst.TheDef->getValueInit("Pattern"))) {
- ListInit *LI = Inst.TheDef->getValueAsListInit("Pattern");
- if (LI && LI->getSize() > 0) {
- DagInit *Dag = (DagInit *)LI->getElement(0);
- DefInit *OpDef = dynamic_cast<DefInit*>(Dag->getOperator());
- if (OpDef) {
- Record *Operator = OpDef->getDef();
- if (Operator->isSubClassOf("SDNode")) {
- const std::string Opcode = Operator->getValueAsString("Opcode");
- if (Opcode == "ISD::STORE" || Opcode == "ISD::TRUNCSTORE")
- isStore = true;
- }
- }
- }
- }
-
// Emit all of the target indepedent flags...
if (Inst.isReturn) OS << "|M_RET_FLAG";
if (Inst.isBranch) OS << "|M_BRANCH_FLAG";
@@ -240,21 +258,21 @@
if (Inst.isBarrier) OS << "|M_BARRIER_FLAG";
if (Inst.hasDelaySlot) OS << "|M_DELAY_SLOT_FLAG";
if (Inst.isCall) OS << "|M_CALL_FLAG";
- if (Inst.isLoad) OS << "|M_LOAD_FLAG";
- if (Inst.isStore || isStore) OS << "|M_STORE_FLAG";
+ if (isLoad) OS << "|M_LOAD_FLAG";
+ if (isStore) OS << "|M_STORE_FLAG";
if (Inst.isImplicitDef)OS << "|M_IMPLICIT_DEF_FLAG";
if (Inst.isPredicable) OS << "|M_PREDICABLE";
if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
if (Inst.isCommutable) OS << "|M_COMMUTABLE";
if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE";
- if (Inst.isNotDuplicable) OS << "|M_NOT_DUPLICABLE";
- if (Inst.hasOptionalDef) OS << "|M_HAS_OPTIONAL_DEF";
+ if (Inst.isNotDuplicable) OS << "|M_NOT_DUPLICABLE";
+ if (Inst.hasOptionalDef) OS << "|M_HAS_OPTIONAL_DEF";
if (Inst.usesCustomDAGSchedInserter)
OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
if (Inst.hasVariableNumberOfOperands) OS << "|M_VARIABLE_OPS";
- if (Inst.mayHaveSideEffects) OS << "|M_MAY_HAVE_SIDE_EFFECTS";
- if (Inst.neverHasSideEffects) OS << "|M_NEVER_HAS_SIDE_EFFECTS";
+ if (Inst.mayHaveSideEffects) OS << "|M_MAY_HAVE_SIDE_EFFECTS";
+ if (NeverHasSideEffects) OS << "|M_NEVER_HAS_SIDE_EFFECTS";
OS << ", 0";
// Emit all of the target-specific flags...
Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.h?rev=45647&r1=45646&r2=45647&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.h (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.h Sat Jan 5 19:53:37 2008
@@ -41,6 +41,10 @@
private:
typedef std::map<std::vector<std::string>, unsigned> OperandInfoMapTy;
+ // Instruction analysis.
+ void InferFromPattern(const CodeGenInstruction &Inst,
+ bool &isStore, bool &isLoad, bool &NeverHasSideEffects);
+
void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
Record *InstrInfo,
std::map<std::vector<Record*>, unsigned> &EL,
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