[llvm-commits] [llvm] r45268 - in /llvm/trunk/lib/Target/X86: X86InstrFormats.td X86InstrSSE.td

[Evan Cheng]

Author: evancheng
Date: Thu Dec 20 13:57:09 2007
New Revision: 45268

URL: http://llvm.org/viewvc/llvm-project?rev=45268&view=rev
Log:
Fix JIT encoding for CMPSD as well.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrFormats.td
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=45268&r1=45267&r2=45268&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Thu Dec 20 13:57:09 2007
@@ -156,11 +156,15 @@
 // SSE2 Instruction Templates:
 // 
 //   SDI   - SSE2 instructions with XD prefix.
+//   SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
 //   PDI   - SSE2 instructions with TB and OpSize prefixes.
 //   PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes.
 
 class SDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern>
       : I<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
+class SDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
+            list<dag> pattern>
+      : Ii8<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
 class PDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern>
       : I<o, F, outs, ins, asm, pattern>, TB, OpSize, Requires<[HasSSE2]>;
 class PDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=45268&r1=45267&r2=45268&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Dec 20 13:57:09 2007
@@ -1085,10 +1085,10 @@
 
 // Comparison instructions
 let isTwoAddress = 1 in {
-  def CMPSDrr : SDI<0xC2, MRMSrcReg, 
+  def CMPSDrr : SDIi8<0xC2, MRMSrcReg, 
                     (outs FR64:$dst), (ins FR64:$src1, FR64:$src, SSECC:$cc),
                     "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>;
-  def CMPSDrm : SDI<0xC2, MRMSrcMem, 
+  def CMPSDrm : SDIi8<0xC2, MRMSrcMem, 
                     (outs FR64:$dst), (ins FR64:$src1, f64mem:$src, SSECC:$cc),
                     "cmp${cc}sd\t{$src, $dst|$dst, $src}", []>;
 }
@@ -1105,12 +1105,12 @@
 
 // Aliases to match intrinsics which expect XMM operand(s).
 let isTwoAddress = 1 in {
-  def Int_CMPSDrr : SDI<0xC2, MRMSrcReg, 
+  def Int_CMPSDrr : SDIi8<0xC2, MRMSrcReg, 
                         (outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc),
                         "cmp${cc}sd\t{$src, $dst|$dst, $src}",
                         [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,
                                            VR128:$src, imm:$cc))]>;
-  def Int_CMPSDrm : SDI<0xC2, MRMSrcMem, 
+  def Int_CMPSDrm : SDIi8<0xC2, MRMSrcMem, 
                         (outs VR128:$dst), (ins VR128:$src1, f64mem:$src, SSECC:$cc),
                         "cmp${cc}sd\t{$src, $dst|$dst, $src}",
                         [(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,