[llvm-commits] [llvm] r44676 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2007-12-05-VectorShuffle.ll test/CodeGen/X86/vec_shuffle-12.ll
Evan Cheng
evan.cheng at apple.com
Fri Dec 7 09:27:48 PST 2007
On Dec 7, 2007, at 8:13 AM, Chris Lattner wrote:
> Hey Evan,
>
>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Dec 7
>> 02:07:39 2007
>> @@ -2754,10 +2754,33 @@
>> }
>>
>> std::swap(V1, V2);
>> - Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0],
>> MaskVec.size());
>> + Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0],
>> NumElems);
>> return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask);
>> }
>>
>> +static
>> +SDOperand CommuteVectorShuffleMask(SDOperand Mask, SelectionDAG
>> &DAG) {
>
> Please add a comment over this that gives an example of what it
> does. I kept misreading the name as "compute..." and couldn't figure
> out what it did :)
Ok.
>
>
>> +static
>> +SDOperand LowerVECTOR_SHUFFLEv8i16(SDOperand V1, SDOperand V2,
>> + SDOperand PermMask,
>> SelectionDAG &DAG,
>> + TargetLowering &TLI) {
>
> Does this cause any pessimizations for v8i16 shuffles that could be
> done as v4i32?
No. Because the lowering before this patch is even worse. :-) I plan
on improving this further.
Evan
>
>
> -Chris
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list