[llvm-commits] [llvm] r42822 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/PowerPC/PPCISelLowering.h lib/Target/PowerPC/PPCInstrFormats.td lib/Target/PowerPC/PPCInstrInfo.td
Evan Cheng
evan.cheng at apple.com
Wed Oct 10 11:44:45 PDT 2007
On Oct 10, 2007, at 11:14 AM, Dale Johannesen wrote:
>
> On Oct 10, 2007, at 12:19 AM, Evan Cheng wrote:
>
>>
>> On Oct 9, 2007, at 6:01 PM, Dale Johannesen wrote:
>>
>>>
>>> ====================================================================
>>> =
>>> =
>>> ========
>>> --- llvm/trunk/include/llvm/CodeGen/SelectionDAG.h (original)
>>> +++ llvm/trunk/include/llvm/CodeGen/SelectionDAG.h Tue Oct 9
>>> 20:01:31 2007
>>> @@ -403,6 +403,8 @@
>>> SDNode *getTargetNode(unsigned Opcode, MVT::ValueType VT,
>>> const SDOperand *Ops, unsigned NumOps);
>>> SDNode *getTargetNode(unsigned Opcode, MVT::ValueType VT1,
>>> + MVT::ValueType VT2);
>>> + SDNode *getTargetNode(unsigned Opcode, MVT::ValueType VT1,
>>> MVT::ValueType VT2, SDOperand Op1);
>>
>> This seems unnecessary. You can use this variant:
>> SDNode *getTargetNode(unsigned Opcode, MVT::ValueType VT1,
>> MVT::ValueType VT2,
>> const SDOperand *Ops, unsigned NumOps);
>
> It's not me using it, it's tablegen. I could change that as you
> suggest but
> this seems simpler. No good reason not to support it, is there?
Ah ok. I'll fix it then. Please file a bug so I remember it. :-)
>
>> Ewww. :-) It just occurred to me you might want to implement this lot
>> with the usesCustomDAGSchedInserter = 1 hack. It allows you to expand
>> a pseudo PPC FP_ROUND_INREG node into multiple MI's at the end of
>> scheduling. It's also a hack but might be a little bit cleaner than
>> this. Sorry it didn't come to me when we were talking about this. :-(
>
> Yes, that would be cleaner. I'll push the rewrite on my stack, but
> I want
> to make progress in functionality.
Sounds good.
Evan
>
>
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