[llvm-commits] [llvm] r42640 - in /llvm/trunk/lib/Target/X86: X86InstrInfo.td X86InstrX86-64.td

[Evan Cheng]

Author: evancheng
Date: Fri Oct  5 12:59:57 2007
New Revision: 42640

URL: http://llvm.org/viewvc/llvm-project?rev=42640&view=rev
Log:
ADC and SBB uses EFLAGS.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td
    llvm/trunk/lib/Target/X86/X86InstrX86-64.td

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=42640&r1=42639&r2=42640&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Oct  5 12:59:57 2007
@@ -1853,6 +1853,7 @@
                 [(store (add (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>;
 }
 
+let Uses = [EFLAGS] in {
 let isCommutable = 1 in {  // X = ADC Y, Z --> X = ADC Z, Y
 def ADC32rr  : I<0x11, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                  "adc{l}\t{$src2, $dst|$dst, $src2}",
@@ -1879,6 +1880,7 @@
                      "adc{l}\t{$src2, $dst|$dst, $src2}",
              [(store (adde (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>;
 }
+} // Uses = [EFLAGS]
 
 def SUB8rr   : I<0x28, MRMDestReg, (outs GR8 :$dst), (ins GR8 :$src1, GR8 :$src2),
                  "sub{b}\t{$src2, $dst|$dst, $src2}",
@@ -1945,6 +1947,7 @@
                 [(store (sub (load addr:$dst), i32immSExt8:$src2), addr:$dst)]>;
 }
 
+let Uses = [EFLAGS] in {
 def SBB32rr    : I<0x19, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                   "sbb{l}\t{$src2, $dst|$dst, $src2}",
                  [(set GR32:$dst, (sube GR32:$src1, GR32:$src2))]>;
@@ -1972,6 +1975,7 @@
 def SBB32ri8 : Ii8<0x83, MRM3r, (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2),
                    "sbb{l}\t{$src2, $dst|$dst, $src2}",
                    [(set GR32:$dst, (sube GR32:$src1, i32immSExt8:$src2))]>;
+} // Uses = [EFLAGS]
 } // Defs = [EFLAGS]
 
 let Defs = [EFLAGS] in {

Modified: llvm/trunk/lib/Target/X86/X86InstrX86-64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrX86-64.td?rev=42640&r1=42639&r2=42640&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrX86-64.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrX86-64.td Fri Oct  5 12:59:57 2007
@@ -262,6 +262,7 @@
                     "add{q}\t{$src2, $dst|$dst, $src2}",
                 [(store (add (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>;
 
+let Uses = [EFLAGS] in {
 let isTwoAddress = 1 in {
 let isCommutable = 1 in
 def ADC64rr  : RI<0x11, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
@@ -289,6 +290,7 @@
 def ADC64mi8 : RIi8<0x83, MRM2m, (outs), (ins i64mem:$dst, i64i8imm :$src2),
                     "adc{q}\t{$src2, $dst|$dst, $src2}",
                [(store (adde (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>;
+} // Uses = [EFLAGS]
 
 let isTwoAddress = 1 in {
 def SUB64rr  : RI<0x29, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
@@ -317,6 +319,7 @@
                     "sub{q}\t{$src2, $dst|$dst, $src2}",
                 [(store (sub (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>;
 
+let Uses = [EFLAGS] in {
 let isTwoAddress = 1 in {
 def SBB64rr    : RI<0x19, MRMDestReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
                     "sbb{q}\t{$src2, $dst|$dst, $src2}",
@@ -343,6 +346,7 @@
 def SBB64mi8 : RIi8<0x83, MRM3m, (outs), (ins i64mem:$dst, i64i8imm :$src2), 
                     "sbb{q}\t{$src2, $dst|$dst, $src2}",
                [(store (sube (load addr:$dst), i64immSExt8:$src2), addr:$dst)]>;
+} // Uses = [EFLAGS]
 } // Defs = [EFLAGS]
 
 // Unsigned multiplication