[llvm-commits] [llvm] r42347 - /llvm/trunk/lib/Target/X86/README.txt

[Chris Lattner]

Author: lattner
Date: Wed Sep 26 01:29:31 2007
New Revision: 42347

URL: http://llvm.org/viewvc/llvm-project?rev=42347&view=rev
Log:
move PR1160 here.

Modified:
    llvm/trunk/lib/Target/X86/README.txt

Modified: llvm/trunk/lib/Target/X86/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README.txt?rev=42347&r1=42346&r2=42347&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/README.txt (original)
+++ llvm/trunk/lib/Target/X86/README.txt Wed Sep 26 01:29:31 2007
@@ -1208,3 +1208,34 @@
 
 Re-materialize MOV32r0 etc. with xor instead of changing them to moves if the
 condition register is dead. xor reg reg is shorter than mov reg, #0.
+
+//===---------------------------------------------------------------------===//
+
+We aren't matching RMW instructions aggressively
+enough.  Here's a reduced testcase (more in PR1160):
+
+define void @test(i32* %huge_ptr, i32* %target_ptr) {
+        %A = load i32* %huge_ptr                ; <i32> [#uses=1]
+        %B = load i32* %target_ptr              ; <i32> [#uses=1]
+        %C = or i32 %A, %B              ; <i32> [#uses=1]
+        store i32 %C, i32* %target_ptr
+        ret void
+}
+
+$ llvm-as < t.ll | llc -march=x86-64
+
+_test:
+        movl (%rdi), %eax
+        orl (%rsi), %eax
+        movl %eax, (%rsi)
+        ret
+
+That should be something like:
+
+_test:
+        movl (%rdi), %eax
+        orl %eax, (%rsi)
+        ret
+
+//===---------------------------------------------------------------------===//
+