[llvm-commits] [llvm] r42049 - in /llvm/trunk/lib/Target/X86: X86FloatingPoint.cpp X86RegisterInfo.cpp

[Dale Johannesen]

Author: johannes
Date: Mon Sep 17 15:15:38 2007
New Revision: 42049

URL: http://llvm.org/viewvc/llvm-project?rev=42049&view=rev
Log:
Remove RSTRegClass case from loadRegFromStackSlot
and storeRegToStackSlot.  Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)

Modified:
    llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
    llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp?rev=42049&r1=42048&r2=42049&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp Mon Sep 17 15:15:38 2007
@@ -608,7 +608,7 @@
   // If we have one _and_ we don't want to pop the operand, duplicate the value
   // on the stack instead of moving it.  This ensure that popping the value is
   // always ok.
-  // Ditto FISTTP16m, FISTTP32m, FISTTP64m.
+  // Ditto FISTTP16m, FISTTP32m, FISTTP64m, ST_FpP80m.
   //
   if (!KillsSrc &&
       (MI->getOpcode() == X86::IST_Fp64m32 ||

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=42049&r1=42048&r2=42049&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Mon Sep 17 15:15:38 2007
@@ -170,9 +170,7 @@
     Opc = X86::MOV16_mr;
   } else if (RC == &X86::RFP80RegClass) {
     Opc = X86::ST_FpP80m;   // pops
-  } else if (RC == &X86::RFP64RegClass || RC == &X86::RSTRegClass) {
-    /// FIXME spilling long double values as 64 bit does not work.
-    /// We need RST80, unfortunately.
+  } else if (RC == &X86::RFP64RegClass) {
     Opc = X86::ST_Fp64m;
   } else if (RC == &X86::RFP32RegClass) {
     Opc = X86::ST_Fp32m;
@@ -211,7 +209,7 @@
     Opc = X86::MOV16_rm;
   } else if (RC == &X86::RFP80RegClass) {
     Opc = X86::LD_Fp80m;
-  } else if (RC == &X86::RFP64RegClass || RC == &X86::RSTRegClass) {
+  } else if (RC == &X86::RFP64RegClass) {
     Opc = X86::LD_Fp64m;
   } else if (RC == &X86::RFP32RegClass) {
     Opc = X86::LD_Fp32m;