[llvm-commits] [llvm] r41947 - /llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

[Evan Cheng]

Author: evancheng
Date: Thu Sep 13 20:57:02 2007
New Revision: 41947

URL: http://llvm.org/viewvc/llvm-project?rev=41947&view=rev
Log:
Fix comments.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=41947&r1=41946&r2=41947&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Sep 13 20:57:02 2007
@@ -157,8 +157,8 @@
                       .addReg(PPC::R0, false, false, true), FrameIdx);
   } else if (RC == PPC::VRRCRegisterClass) {
     // We don't have indexed addressing for vector loads.  Emit:
-    // R11 = ADDI FI#
-    // Dest = LVX R0, R11
+    // R0 = ADDI FI#
+    // STVX VAL, 0, R0
     // 
     // FIXME: We use R0 here, because it isn't available for RA.
     addFrameReference(BuildMI(MBB, MI, TII.get(PPC::ADDI), PPC::R0),
@@ -210,8 +210,8 @@
     BuildMI(MBB, MI, TII.get(PPC::MTCRF), DestReg).addReg(PPC::R0);
   } else if (RC == PPC::VRRCRegisterClass) {
     // We don't have indexed addressing for vector loads.  Emit:
-    // R11 = ADDI FI#
-    // Dest = LVX R0, R11
+    // R0 = ADDI FI#
+    // Dest = LVX 0, R0
     // 
     // FIXME: We use R0 here, because it isn't available for RA.
     addFrameReference(BuildMI(MBB, MI, TII.get(PPC::ADDI), PPC::R0),