[llvm-commits] [llvm] r41807 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Chris Lattner]

Author: lattner
Date: Mon Sep 10 16:39:07 2007
New Revision: 41807

URL: http://llvm.org/viewvc/llvm-project?rev=41807&view=rev
Log:
Emit:

        cmpl    %eax, %ecx
        setae   %al
        movzbl  %al, %eax

instead of:

        cmpl    %eax, %ecx
        setb    %al
        xorb    $1, %al
        movzbl  %al, %eax

when using logical not of a C comparison.


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=41807&r1=41806&r2=41807&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon Sep 10 16:39:07 2007
@@ -1941,6 +1941,16 @@
     assert(0 && "Unhandled SetCC Equivalent!");
     abort();
   }
+  // fold (not (zext (setcc x, y))) -> (zext (not (setcc x, y)))
+  if (N1C && N1C->getValue() == 1 && N0.getOpcode() == ISD::ZERO_EXTEND &&
+      N0.Val->hasOneUse() && isSetCCEquivalent(N0.getOperand(0), LHS, RHS, CC)){
+    SDOperand V = N0.getOperand(0);
+    V = DAG.getNode(ISD::XOR, V.getValueType(), V, 
+                    DAG.getConstant(V.getValueType(), 1));
+    AddToWorkList(V.Val);
+    return DAG.getNode(ISD::ZERO_EXTEND, VT, V);
+  }
+  
   // fold !(x or y) -> (!x and !y) iff x or y are setcc
   if (N1C && N1C->getValue() == 1 && VT == MVT::i1 &&
       (N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) {