[llvm-commits] [llvm] r41711 - in /llvm/trunk: lib/Target/PowerPC/PPCInstr64Bit.td test/CodeGen/PowerPC/rotl-64.ll

[Evan Cheng]

Author: evancheng
Date: Tue Sep  4 15:20:29 2007
New Revision: 41711

URL: http://llvm.org/viewvc/llvm-project?rev=41711&view=rev
Log:
Fix for PR1613: added 64-bit rotate left PPC instructions and patterns.

Added:
    llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td?rev=41711&r1=41710&r2=41711&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstr64Bit.td Tue Sep  4 15:20:29 2007
@@ -338,6 +338,10 @@
 }
 
 // Rotate instructions.
+def RLDCL  : MDForm_1<30, 0,
+                      (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MB),
+                      "rldcl $rA, $rS, $rB, $MB", IntRotateD,
+                      []>, isPPC64;
 def RLDICL : MDForm_1<30, 0,
                       (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MB),
                       "rldicl $rA, $rS, $SH, $MB", IntRotateD,
@@ -579,6 +583,12 @@
 def : Pat<(srl G8RC:$in, (i32 imm:$imm)),
           (RLDICL G8RC:$in, (SRL64 imm:$imm), imm:$imm)>;
 
+// ROTL
+def : Pat<(rotl G8RC:$in, GPRC:$sh),
+          (RLDCL G8RC:$in, GPRC:$sh, 0)>;
+def : Pat<(rotl G8RC:$in, (i32 imm:$imm)),
+          (RLDICL G8RC:$in, imm:$imm, 0)>;
+
 // Hi and Lo for Darwin Global Addresses.
 def : Pat<(PPChi tglobaladdr:$in, 0), (LIS8 tglobaladdr:$in)>;
 def : Pat<(PPClo tglobaladdr:$in, 0), (LI8  tglobaladdr:$in)>;

Added: llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll?rev=41711&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/rotl-64.ll Tue Sep  4 15:20:29 2007
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=ppc64 | grep rldicl
+; RUN: llvm-as < %s | llc -march=ppc64 | grep rldcl
+; PR1613
+
+define i64 @t1(i64 %A) {
+	%tmp1 = lshr i64 %A, 57
+        %tmp2 = shl i64 %A, 7
+        %tmp3 = or i64 %tmp1, %tmp2
+	ret i64 %tmp3
+}
+
+define i64 @t2(i64 %A, i8 zeroext %Amt) {
+	%Amt1 = zext i8 %Amt to i64
+	%tmp1 = lshr i64 %A, %Amt1
+        %Amt2  = sub i8 64, %Amt
+	%Amt3 = zext i8 %Amt2 to i64
+        %tmp2 = shl i64 %A, %Amt3
+        %tmp3 = or i64 %tmp1, %tmp2
+	ret i64 %tmp3
+}