[llvm-commits] [llvm] r41156 - /llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
Bruno Cardoso Lopes
bruno.cardoso at gmail.com
Fri Aug 17 19:01:28 PDT 2007
Author: bruno
Date: Fri Aug 17 21:01:28 2007
New Revision: 41156
URL: http://llvm.org/viewvc/llvm-project?rev=41156&view=rev
Log:
Added InstrItinClass support for instruction formats
Modified:
llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
Modified: llvm/trunk/lib/Target/Mips/MipsInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFormats.td?rev=41156&r1=41155&r2=41156&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFormats.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFormats.td Fri Aug 17 21:01:28 2007
@@ -22,8 +22,8 @@
//===----------------------------------------------------------------------===//
// Generic Mips Format
-class MipsInst<dag outs, dag ins, string asmstr, list<dag> pattern>:
- Instruction
+class MipsInst<dag outs, dag ins, string asmstr, list<dag> pattern,
+ InstrItinClass itin>: Instruction
{
field bits<32> Inst;
@@ -35,7 +35,8 @@
let Inst{31-26} = opcode;
dag OutOperandList = outs;
- dag InOperandList = ins;
+ dag InOperandList = ins;
+
let AsmString = asmstr;
let Pattern = pattern;
}
@@ -46,8 +47,8 @@
//===----------------------------------------------------------------------===//
class FR<bits<6> op, bits<6> _funct, dag outs, dag ins, string asmstr,
- list<dag> pattern>:
- MipsInst<outs, ins, asmstr, pattern>
+ list<dag> pattern, InstrItinClass itin>:
+ MipsInst<outs, ins, asmstr, pattern, itin>
{
bits<5> rd;
bits<5> rs;
@@ -69,8 +70,8 @@
// Format I instruction class in Mips : <|opcode|rs|rt|immediate|>
//===----------------------------------------------------------------------===//
-class FI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern>:
- MipsInst<outs, ins, asmstr, pattern>
+class FI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
+ InstrItinClass itin>: MipsInst<outs, ins, asmstr, pattern, itin>
{
bits<5> rt;
bits<5> rs;
@@ -87,8 +88,8 @@
// Format J instruction class in Mips : <|opcode|address|>
//===----------------------------------------------------------------------===//
-class FJ<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern>:
- MipsInst<outs, ins, asmstr, pattern>
+class FJ<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
+ InstrItinClass itin>: MipsInst<outs, ins, asmstr, pattern, itin>
{
bits<26> addr;
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